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词条 List of 7400-series integrated circuits
释义

  1. Overview

  2. Larger footprints

  3. Smaller footprints

     One gate chips  Two gate chips  Three gate chips 

  4. See also

  5. References

  6. Further reading

The following is a list of 7400-series digital logic integrated circuits. The original 7400-series integrated circuits were made by Texas Instruments with the prefix "SN" to create the name SN74xx. Due to the popularity of these parts, other manufacturers have released pin-to-pin compatible devices which kept the 7400 sequence number as an aid to identification of compatible parts. However, different manufacturers will use different prefixes or no prefix at all.

Overview

Some TTL logic parts were made with an extended military-specification temperature range. These parts are prefixed with 54 instead of 74 in the part number. A short-lived 64 prefix on Texas Instruments parts indicated an industrial temperature range; this prefix had been dropped from the TI literature by 1973. Most recent 7400 series parts are fabricated in CMOS or BiCMOS technology rather than TTL. Surface mount parts with a single gate (often in a 5-pin or 6-pin package) are prefixed with 741G instead of 74.

Some manufacturers released some 4000-series equivalent CMOS circuits with a 74 prefix, for example the 74HC4066 was a replacement for the 4066 with slightly different electrical characteristics (different power supply voltage ratings, higher frequency capabilities, lower "on" resistances in analog switches, etc.). See List of 4000-series integrated circuits.

Conversely, the 4000-series has "borrowed" from the 7400 series - such as the CD40193 and CD40161 being pin-for-pin functional replacements for 74C193 and 74C161.

Older TTL parts made by manufacturers such as Signetics, Motorola, Mullard and Siemens may have different numeric prefix and numbering series entirely, such as in the European FJ family FJH101 is an 8-input NAND gate like a 7430.

A few alphabetic characters to designate a specific logic subfamily may immediately follow the 74 or 54 in the

part number, e.g., 74LS74 for Low-power Schottky. Some CMOS parts such as 74HCT74 for High-speed CMOS with TTL-compatible input thresholds are functionally similar to the TTL part. Not all functions are available in all families.

In a few instances, such as the 7478 and 74107, the same suffix in different families do not have completely equivalent logic functions.

Another extension to the series is the 7416xxx variant, representing mostly the 16-bit wide counterpart of otherwise 8-bit-wide "base" chips with the same three ending digits. Thus e.g. a "7416373" would be the 16-bit-wide equivalent of a "74373". Some 7416xxx parts, however, do not have a direct counterpart from the standard 74xxx range but deliver new functionality instead, which needs making use of the 7416xxx series' higher pin count. For more details, refer primarily to the Texas Instruments documentation mentioned in the References section.

For CMOS (AC, HC, etc.) subfamilies, read "open drain" for "open collector" in the table below.

There are a few numeric suffixes that have multiple conflicting assignments, such as the 74453.

Larger footprints

Parts in this section have a pin count of 14 pins or more. The lower part numbers were established in the 1960s and 1970s, then higher part numbers were added incrementally over decades. IC manufacturers continue to make a core subset of this group, but many of these part numbers are considered obsolete and no longer manufactured. Older discontinued parts may be available from a limited number of sellers as new old stock (NOS), though some are much harder to find.

For the following table:

  • Part number column - the "x" is a place holder for the logic subfamily name. For example, 74x00 in "LS" logic family would be "74LS00".
  • Description column - the terms schmitt-trigger, open-collector/open-drain, three-state were moved to the input and output columns to make it easier to sort by those features.
  • Input column - a blank cell means a normal input for the logic family type.
  • Output column - a blank cell means a 'totem pole' output, also known as a push–pull output, with the ability to drive ten standard inputs of the same logic subfamily (fan-out NO=10). Outputs with higher output currents are often called drivers or buffers.
  • Pins column - number of pins for the dual in-line package version; a number in brackets indicates that there is no known dual in-line package version of this IC
Part number|74x00 – 74x99 Units Description Input Output Pins Datasheet
74x00 4 quad 2-input NAND gate 14SN74LS00
74x01 4 quad 2-input NAND gate open-collector 14 SN74LS01
74x02 4 quad 2-input NOR gate 14 SN74LS02
74x03 4 quad 2-input NAND gate open-collector 14 SN74LS03
74x04 6 hex inverter gate 14 SN74LS04
74x05 6 hex inverter gate open-collector 14 SN74LS05
74x06 6 hex inverter gate open-collector 30 V / 40 mA 14 SN74LS06
74x07 6 hex buffer gate open-collector 30 V / 40 mA 14 SN74LS07
74x08 4 quad 2-input AND gate 14 SN74LS08
74x09 4 quad 2-input AND gate open-collector 14 SN74LS09
74x10 3 triple 3-input NAND gate 14 SN74LS10
74x11 3 triple 3-input AND gate 14 SN74LS11
74x12 3 triple 3-input NAND gate open-collector 14 SN74LS12
74x13 2 dual 4-input NAND gate schmitt-trigger 14 SN74LS13
74x14 6 hex inverter gate schmitt-trigger 14 SN74LS14
74x15 3 triple 3-input AND gate open-collector 14 SN74LS15
74x16 6 hex inverter gate open-collector 15 V / 40 mA 14 SN7416
74x17 6 hex buffer gate open-collector 15 V / 40 mA 14 SN7417
74x18 2 dual 4-input NAND gate schmitt-trigger 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n149 SN74LS18]
74x19 6 hex inverter gate schmitt-trigger 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n149 SN74LS19]
74x20 2 dual 4-input NAND gate 14 SN74LS20
74x21 2 dual 4-input AND gate 14 SN74LS21
74x22 2 dual 4-input NAND gate open-collector 14 SN74LS22
74x23 2 dual 4-input NOR gate with strobe, one gate expandable with 74x60 16 SN7423
74x24 4 quad 2-input NAND gate schmitt-trigger 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n149 SN74LS24]
74x25 2 dual 4-input NOR gate with strobe 14 SN7425
74x26 4 quad 2-input NAND gate open-collector 15 V 14 SN74LS26
74x27 3 triple 3-input NOR gate 14 SN74LS27
74x28 4 quad 2-input NOR gate driver NO=30 14 SN74LS28
74x29 2 dual 4-input NOR gate 14 [https://archive.org/stream/bitsavers_derivationates1974DigitalIntegratedCircuitDataBook_79049866#page/n101 US7429A]
74x30 1 single 8-input NAND gate 14 SN74LS30
74x31 6 hex delay elements 16 SN74LS31
74x32 4 quad 2-input OR gate 14 SN74LS32
74x33 4 quad 2-input NOR gate open-collector driver NO=30 14 SN74LS33
74x34 6 hex buffer gate 14 MM74HC34
74x35 6 hex buffer gate open-collector 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n101 SN74ALS35]
74x36 4 quad 2-input NOR gate (different pinout than 7402) 14 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n81 SN74HC36]
74x37 4 quad 2-input NAND gate driver NO=30 14 SN74LS37
74x38 4 quad 2-input NAND gate open-collector driver NO=30 14 SN74LS38
74x39 4 quad 2-input NAND gate (different pinout than 7438) open-collector 60 mA 14 SN7439
74x40 2 dual 4-input NAND gate driver NO=30 14 SN74LS40
74x41 1 BCD to decimal decoder / Nixie tube driver open-collector 70 V 16 [https://archive.org/stream/bitsavers_nationaldaTTLDatabook_42712617/1976_National_TTL_Databook#page/n146 DM7441A]
74x42 1 BCD to decimal decoder 16 SN74LS42
74x43 1 excess-3 to decimal decoder 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n231 SN7443A]
74x44 1 Gray code to decimal decoder 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n231 SN7444A]
74x45 1 BCD to decimal decoder/driver open-collector 30 V / 80 mA 16 SN7445
74x46 1 BCD to 7-segment display decoder/driver open-collector 30 V 16 SN7446A
74x47 1 BCD to 7-segment decoder/driver open-collector 15 V 16 SN74LS47
74x48 1 BCD to 7-segment decoder/driver open-collector, 2 kΩ pull-up 16 SN74LS48
74x49 1 BCD to 7-segment decoder/driver open-collector 14 SN74LS49
74x50 2 dual 2-2-input AND-OR-Invert gate, one gate expandable 14 SN7450
7451, 74H51, 74S51 2 dual 2-2-input AND-OR-Invert gate 14 SN7451
74L51, 74LS51 2 3-3-input AND-OR-Invert gate and 2-2-input AND-OR-Invert gate 14 SN74LS51
74x52 1 3-2-2-2-input AND-OR gate, expandable with 74x61 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n271 SN74H52]
7453 1 2-2-2-2-input AND-OR-Invert gate, expandable 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n273 SN7453]
74H53 1 3-2-2-2-input AND-OR-Invert gate, expandable 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n273 SN74H53]
7454 1 2-2-2-2-input AND-OR-Invert gate 14 SN7454
74H54 1 3-2-2-2-input AND-OR-Invert gate 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n279 SN74H54]
74L54, 74LS54 1 3-3-2-2-input AND-OR-Invert gate 14 SN74LS54
74x55 1 4-4-input AND-OR-Invert gate, 74H55 is expandable 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n287 SN74LS55]
74x56 1 50:1 frequency divider 8 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n291 SN74LS56]
74x57 1 60:1 frequency divider 8 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n291 SN74LS57]
74x58 2 3-3-input AND-OR gate and 2-2-input AND-OR gate 14 [https://media.digikey.com/pdf/Data%20Sheets/NXP%20PDFs/74HC58.pdf 74HC58]
74x59 2 dual 3-2-input AND-OR-Invert gate 14 [https://archive.org/stream/bitsavers_derivationates1974DigitalIntegratedCircuitDataBook_79049866#page/n103 US7459A]
74x60 2 dual 4-input expander for 74x23, 74x50, 74x53, 74x55{{sp}}}} 14 SN7460
74x61 3 triple 3-input expander for 74x52{{sp}}}} 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n299 SN74H61]
74x62 1 3-3-2-2-input AND-OR expander for 74x50, 74x53, 74x55{{sp}}}} 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n301 SN74H62]
74x63 6 hex current sensing interface gates{{sp}}}} 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n303 SN74LS63]
74x64 1 4-3-2-2-input AND-OR-Invert gate 14 SN74S64
74x65 1 4-3-2-2 input AND-OR-Invert gate open-collector 14 SN74S65
74x67 1 AND gated J-K master-slave flip-flop, asynchronous preset and clear (improved 74L72) (16) [https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/19720020596.pdf BL54L67Y]
74L68 2 dual J-K flip-flop, asynchronous clear (improved 74L73) (18) [https://ntrs.nasa.gov/archive/nasa/casi.ntrs.nasa.gov/19720020596.pdf BL54L68Y]
74LS68 2 dual 4-bit decade counters 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n311 SN74LS68]
74L69 2 dual J-K flip-flop, asynchronous preset, common clock and clear (18) [https://archive.org/stream/bitsavers_derivationates1974DigitalIntegratedCircuitDataBook_79049866#page/n47 BL54L69Y]
74LS69 2 dual 4-bit binary counters 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n311 SN74LS69]
74x70 1 AND-gated positive edge triggered J-K flip-flop, asynchronous preset and clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n317 SN7470]
74H71 1 AND-or-gated J-K master-slave flip-flop, preset 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n321 SN74H71]
74L71 1 AND-gated R-S master-slave flip-flop, preset and clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n325 SN54L71]
74x72 1 AND gated J-K master-slave flip-flop, asynchronous preset and clear 14 SN7472
74x73 2 dual J-K flip-flop, asynchronous clear 14 SN54LS73A
74x74 2 dual D positive edge triggered flip-flop, asynchronous preset and clear 14 SN74LS74A
74x75 2 4-bit bistable latch, complementary outputs 16 SN74LS75
74x76 2 dual J-K flip-flop, asynchronous preset and clear 16 SN74LS76A
74x77 1 4-bit bistable latch 14 SN74LS77
74H78 2 dual positive pulse triggered J-K flip-flop, preset, common clock and common clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n369 SN74H78]
74L78 2 dual positive pulse triggered J-K flip-flop, preset, common clock and common clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n369 SN54L78]
74LS78 2 dual negative edge triggered J-K flip-flop, preset, common clock and common clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n369 SN74LS78A]
74x79 2 dual D positive edge triggered flip-flop, asynchronous preset and clear 14 [https://archive.org/stream/bitsavers_motoroladaTTLIntegratedCircuitsDataBook_38442857/1971_Motorola_TTL_Integrated_Circuits_Data_Book#page/n387 MC7479]
74x80 1 gated full adder 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n377 SN7480]
74x81 1 16-bit RAM 14 SN7481A
74x82 1 2-bit binary full adder 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n379 SN7482]
74x83 1 4-bit binary full adder 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n383 SN74LS83A]
74x84 1 16-bit RAM 16 SN7484A
74x85 1 4-bit magnitude comparator 16 SN74LS85
74x86 4 quad 2-input XOR gate 14 SN74LS86A
74x87 1 4-bit true/complement/zero/one element 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n403 SN74H87]
74x88 1 256-bit ROM (32x8) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n181 SN7488A]
74x89 1 64-bit RAM (16x4), inverted outputs open-collector 16 SN7489
74x90 1 decade counter (separate divide-by-2 and divide-by-5 sections) 14 SN74LS90
74x91 1 8-bit shift register, serial in, serial out, gated input 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n419 SN74LS91]
74x92 1 divide-by-12 counter (separate divide-by-2 and divide-by-6 sections) 14 SN74LS92
74x93 1 4-bit binary counter (separate divide-by-2 and divide-by-8 sections) 14 SN74LS93
74x94 1 4-bit shift register, dual asynchronous presets 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n423 SN7494]
74x95 1 4-bit shift register, parallel in, parallel out, serial input 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n427 SN74LS95B]
74x96 1 5-bit parallel-in/parallel-out shift register, asynchronous preset 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n435 SN74LS96]
74x97 1 synchronous 6-bit binary rate multiplier 16 SN7497
74x98 1 4-bit data selector/storage register 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n449 SN54L98]
74x99 1 4-bit bidirectional universal shift register 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n451 SN54L99]
Part number|74x100 – 74x199 Units Description Input Output Pins Datasheet
74x100 2 dual 4-bit bistable latch 24 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n457 SN74100]
74x101 1 AND-OR-gated J-K negative-edge-triggered flip-flop, preset 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n459 SN74H101]
74x102 1 AND-gated J-K negative-edge-triggered flip-flop, preset and clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n463 SN74H102]
74x103 2 dual J-K negative-edge-triggered flip-flop, clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n465 SN74H103]
74x104 1 J-K master-slave flip-flop 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n469 SN74104]
74x105 1 J-K master-slave flip-flop, J2 and K2 inverted 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n469 SN74105]
74x106 2 dual J-K negative-edge-triggered flip-flop, preset and clear 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n471 SN74H106]
74x107 2 dual J-K flip-flop, clear 14 SN74107
74x107A 2 dual J-K negative-edge-triggered flip-flop, clear 14 [https://web.archive.org/web/20070125105009/http://focus.ti.com:80/lit/ds/symlink/sn74107.pdf SN74LS107A]
74x108 2 dual J-K negative-edge-triggered flip-flop, preset, common clear and common clock 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n479 SN74H108]
74x109 2 dual J-Not-K positive-edge-triggered flip-flop, clear and preset 16 SN74109
74x110 1 AND-gated J-K master-slave flip-flop, data lockout 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n487 SN74110]
74x111 2 dual J-K master-slave flip-flop, data lockout, reset, set 16 TL74111N
74x112 2 dual J-K negative-edge-triggered flip-flop, clear and preset 16 SN74LS112A
74x113 2 dual J-K negative-edge-triggered flip-flop, preset 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n499 SN74LS113A]
74x114 2 dual J-K negative-edge-triggered flip-flop, preset, common clock and clear 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n505 SN74LS114A]
74x115 2 dual J-K master-slave flip-flop, data lockout, reset 14 TL74115N
74116 2 dual 4-bit latch, clear 24 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n511 SN74116]
74H116 1 AND-gated J-K flip flop{{?}}}}{{?}}}} 14 [https://archive.org/details/Digital_IC_Equivalents/page/n97 MC74H116]
74x117 1 AND-gated J-K flip flop, one J and K input inverted{{?}}}}{{?}}}} 14 [https://archive.org/details/Digital_IC_Equivalents/page/n97 MC74H117]
74x118 6 hex set/reset latch, common reset 16 [https://archive.org/details/bitsavers_ittdataBootorProductCatalog_54440015/page/n161 ITT74118]
74119 6 hex set/reset latch{{?}}}}{{?}}}} 24 [https://archive.org/stream/bitsavers_derivationates1974DigitalIntegratedCircuitDataBook_79049866#page/n57 TL74119N]
74H119 2 dual J-K flip-flop, shared clear and clock inputs{{?}}}}{{?}}}} 14 [https://archive.org/details/Digital_IC_Equivalents/page/n97 MC74H119]
74120 2 dual pulse synchronizer/drivers 15 kΩ pull-up 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n515 SN74120]
74H120 2 dual J-K flip-flop, separate clock inputs{{?}}}}{{?}}}} 14 [https://archive.org/details/Digital_IC_Equivalents/page/n97 MC74H120]
74x121 1 monostable multivibrator schmitt-trigger 14 SN74121
74x122 1 retriggerable monostable multivibrator, clear 14 SN74122
74x123 2 dual retriggerable monostable multivibrator, clear 16 SN74123
74x124 2 dual voltage-controlled oscillator analog 16 SN74S124
74x125 4 quad bus buffer, negative enable three-state 14 SN74LS125A
74x126 4 quad bus buffer, positive enable three-state 14 SN74LS126A
74x128 4 quad 2-input NOR gate driver 50 Ω 14 SN74128
74x130 2 retriggerable monostable multivibrator 16 SN74130
74x131 4 quad 2-input AND gate open-collector 15 V 14 [https://archive.org/details/bitsavers_ittdataBootorProductCatalog_54440015/page/n181 ITT74131]
74x132 4 quad 2-input NAND gate schmitt-trigger 14 SN74LS132
74x133 1 single 13-input NAND gate 16 SN54ALS133
74x134 1 single 12-input NAND gate three-state 16 SN74S134
74x135 4 quad XOR/XNOR gate, two inputs to select logic type 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n567 SN74S135]
74x136 4 quad 2-input XOR gate open-collector 14 SN74LS136
74x137 1 3-line to 8-line decoder/demultiplexer, address latch, inverting outputs 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n573 SN74LS137]
74x138 1 3-line to 8-line decoder/demultiplexer, inverting outputs 16 SN74LS138
74x139 2 dual 2 to 4-line decoder/demultiplexer, inverting outputs 16 SN74LS139A
74x140 2 dual 4-input NAND driver 50 Ω 14 SN74S140
74x1411BCD to decimal decoder/driver for cold-cathode indicator / Nixie tube open-collector 60 V 16 [https://archive.org/stream/bitsavers_nationaldaTTLDatabook_42712617/1976_National_TTL_Databook#page/n146 DM74141]
74x1421decade counter/latch/decoder/driver for Nixie tubes open-collector 60 V 16 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n137 SN74142]
74x1431decade counter/latch/decoder/7-segment driver constant current 15 mA 24 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n141 SN74143]
74x1441decade counter/latch/decoder/7-segment driver open-collector 15 V / 25 mA 24 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n141 SN74143]
74x1451BCD to decimal decoder/driver open-collector 15 V / 80 mA 16 SN74145
74x146 1 3-line to 8-line decoder{{sp}}}} [https://archive.org/stream/bitsavers_motoroladaTTLIntegratedCircuitsDataBook_38442857/1971_Motorola_TTL_Integrated_Circuits_Data_Book#page/n77 MCE74H146]
74x147110-line to 4-line priority encoder 16 SN74147
74x14818-line to 3-line priority encoder 16 SN74148
74x14918-line to 8-line priority encoder 20 MM74HCT149
74x150116-line to 1-line data selector/multiplexer 24 SN74150
74x15118-line to 1-line data selector/multiplexer 16 SN74151A
74x15218-line to 1-line data selector/multiplexer, inverting output 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n611 SN54152A]
74x1532dual 4-line to 1-line data selector/multiplexer, non-inverting outputs 16 SN74153
74x15414-line to 16-line decoder/demultiplexer, inverting outputs 24 [https://web.archive.org/web/20150321045049/http://www.ti.com/lit/ds/symlink/sn74154.pdf SN74154]
74x1552dual 2-line to 4-line decoder/demultiplexer, inverting outputs 16 SN74155
74x1562dual 2-line to 4-line decoder/demultiplexer, inverting outputs open-collector 16 SN74156
74x1574quad 2-line to 1-line data selector/multiplexer, non-inverting outputs 16 SN74157
74x1584quad 2-line to 1-line data selector/multiplexer, inverting outputs 16 SN74LS158
74x15914-line to 16-line decoder/demultiplexer open-collector 24 [https://web.archive.org/web/20070102021404/http://focus.ti.com:80/lit/ds/symlink/sn74159.pdf SN74159]
74x1601synchronous presettable 4-bit decade counter, asynchronous clear 16 SN74160
74x1611synchronous presettable 4-bit binary counter, asynchronous clear 16 SN74161
74x1621synchronous presettable 4-bit decade counter, synchronous clear 16 SN74162
74x1631synchronous presettable 4-bit binary counter, synchronous clear 16 SN74163
74x16418-bit parallel-out serial shift register, asynchronous clear 14 SN74164
74x16518-bit serial shift register, parallel load, complementary outputs 16 SN74165
74x1661parallel-load 8-bit shift register 16 SN74166
74x1671synchronous decade rate multiplier 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n695 SN74167]
74x1681synchronous presettable 4-bit up/down decade counter 16 [https://archive.org/stream/bitsavers_nationaldaTTLDatabook_42712617/1976_National_TTL_Databook#page/n229 DM74LS168]
74x1691synchronous presettable 4-bit up/down binary counter 16 SN74LS169B
74x170116-bit register file (4x4) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n715 SN74170]
74x1714quad D flip-flops, clear 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n725 SN74LS171]
74x172116-bit multiple port register file (8x2) three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n729 SN74172]
74x1734quad D flip-flop, asynchronous clear three-state 16 SN74173
74x1746hex D flip-flop, common asynchronous clear 16 SN74174
74x1754quad D edge-triggered flip-flop, complementary outputs and asynchronous clear 16 SN74175
74x1761presettable decade (bi-quinary) counter/latch 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n745 SN74176]
74x1771presettable binary counter/latch 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n745 SN74177]
74x17814-bit parallel-access shift register 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n751 SN74178]
74x17914-bit parallel-access shift register, asynchronous clear input, complementary Qd output 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n751 SN74179]
74x18019-bit odd/even parity bit generator and checker 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n755 SN74180]
74x18114-bit arithmetic logic unit and function generator 24 SN74LS181
74x1821lookahead carry generator 16 [https://web.archive.org/web/20160418004301/http://www.ti.com:80/lit/ds/symlink/sn74s182.pdf SN74S182]
74x1832dual carry-save full adder 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n777 SN74LS183]
74x1841BCD to binary converter open-collector 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n781 SN74184]
74x18516-bit binary to BCD converter open-collector 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n781 SN74185A]
74x1861512-bit ROM (64x8) open-collector 24 [https://archive.org/stream/bitsavers_tidataBookForDesignEngineers2ed_29954976/1981_The_TTL_Data_Book_For_Design_Engineers_2ed#page/n121 SN74186]
74x18711024-bit ROM (256x4) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n181 SN74187]
74x1881256-bit PROM (32x8) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S188]
74x189164-bit RAM (16x4), inverting outputs three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n191 SN74S189]
74x1901synchronous presettable up/down decade counter 16 SN74190
74x1911synchronous presettable up/down binary counter 16 SN74191
74x1921synchronous presettable up/down decade counter, clear 16 SN74192
74x1931synchronous presettable up/down 4-bit binary counter, clear 16 SN74193
74x19414-bit bidirectional universal shift register 16 SN74194
74x19514-bit parallel-access shift register 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n829 SN74195]
74x1961presettable decade counter/latch 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n837 SN74196]
74x1971presettable binary counter/latch 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n837 SN74197]
74x19818-bit bidirectional universal shift register 24 [https://web.archive.org/web/20070228042947/http://focus.ti.com:80/lit/ds/symlink/sn74198.pdf SN74198]
74x19918-bit universal shift register, J-Not-K serial inputs 24 [https://web.archive.org/web/20070228042947/http://focus.ti.com:80/lit/ds/symlink/sn74198.pdf SN74199]
Part number|74x200 – 74x299 Units Description Input Output Pins Datasheet
74x2001256-bit RAM (256x1) three-state 16 [https://archive.org/stream/bitsavers_nationaldaTTLDatabook_42712617/1976_National_TTL_Databook#page/n299 DM74S200]
74x2011256-bit RAM (256x1) three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n195 SN74S201]
74x202 1 256-bit RAM (256x1) with power down three-state 16 [https://archive.org/stream/bitsavers_tidataBook2ed05_2617547/05#page/n51 SN74LS202]
74x2061256-bit RAM (256x1) open-collector 16 [https://archive.org/stream/bitsavers_nationaldaTTLDatabook_42712617/1976_National_TTL_Databook#page/n301 DM74S206]
74x20711024-bit RAM (256x4) three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n205 SN74LS207]
74x20811024-bit RAM (256x4), separate data in- and outputs three-state 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n205 SN74LS208]
74x20911024-bit RAM (1024x1) three-state 16 [https://archive.org/stream/bitsavers_tidataBookmoryDataBook1975_9924035/The_Semiconductor_Memory_Data_Book_1975#page/n171 SN74S209]
74x2108octal buffer, inverting three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n311 SN74LS210]
74x211 1 144-bit RAM (16x9) with output latch three-state 20 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n181 74F211]
74x212 1 144-bit RAM (16x9) three-state 20 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n185 74F212]
74x213 1 192-bit RAM (16x12) three-state 20 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n189 74F213]
74x214 1 1024-bit RAM (1024x1) three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n199 SN74LS214]
74x215 1 1024-bit RAM (1024x1) with power-down mode three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n199 SN74LS215]
74x216 1 256-bit RAM (64x4), common I/O three-state 16 [https://web.archive.org/web/20181101135029/https://www.datasheetarchive.com/pdf/download.php?id=2efa1ada205a131215dab3426435b9f9627932&type=M&term=sn74ls216 SN74LS216]
74x217 1 256-bit RAM (64x4) three-state 20 [https://archive.org/stream/bitsavers_tidataBookuitsDataBook_32771470/1983_ALS_AL_Logic_Circuits_Data_Book#page/n173 SN74ALS217]
74x218 1 256-bit RAM (32x8) three-state 20 [https://archive.org/stream/bitsavers_tidataBookuitsDataBook_32771470/1983_ALS_AL_Logic_Circuits_Data_Book#page/n173 SN74ALS218]
74x219164-bit RAM (16x4), non-inverting outputs three-state 16 [https://archive.org/stream/SupplementToTheTTLDataBookForDesignEngineers2ndEdition/Supplement%20to%20The%20TTL%20Data%20Book%20for%20Design%20Engineers_2nd_Edition#page/n5 SN74LS219]
74x2212dual monostable multivibrator schmitt-trigger 16 SN74221
74x2221 64-bit FIFO memory (16x4), synchronous, input/output ready enable three-state 20 SN74LS722
74x2241 64-bit FIFO memory (16x4), synchronous three-state 16 SN74LS724
74x225180-bit FIFO memory (16x5), asynchronous three-state 20 SN74S225
74x22614-bit parallel latched bus transceiver three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n219 SN74S226]
74x2271 64-bit FIFO memory (16x4), synchronous, input/output ready enable open-collector 20 SN74LS727
74x2281 64-bit FIFO memory (16x4), synchronous open-collector 20 SN74LS728
74x229180-bit FIFO memory (16x5), asynchronous three-state 20 [https://web.archive.org/web/20070101063514/http://focus.ti.com:80/lit/ds/symlink/sn74als229b.pdf SN74ALS229B]
74x2308octal buffer/driver, true and complementary outputs three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n245 SN74AS230]
74x2318octal buffer and line driver, G and /G complementary inputs three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n245 SN74AS231]
74x232 1 64-bit FIFO memory (16x4), asynchronous three-state 16 SN74ALS232B
74x233180-bit FIFO memory (16x5), asynchronous three-state 20 [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n101 SN74ALS233B]
74x234 1 256-bit FIFO memory (64x4), asynchronous three-state 16 [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n63 SN74ALS234]
74x235 1 320-bit FIFO memory (64x5), asynchronous three-state 20 [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n109 SN74ALS235]
74x236 1 256-bit FIFO memory (64x4), asynchronous three-state 16 [https://web.archive.org/web/20070102044700/http://focus.ti.com/lit/ds/symlink/sn74als236.pdf SN74ALS236]
74x23713-of-8 decoder/demultiplexer, address latch, active high outputs 16 CD74HC237
74x23813-of-8 decoder/demultiplexer, active high outputs 16 CD74HC238
74x2392dual 2-of-4 decoder/demultiplexer, active high outputs 16 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n241 SN74HC239]
74x2408 octal buffer, inverting outputs schmitt-trigger three-state 20 SN74LS240
74x2418octal buffer, non-inverting outputs schmitt-trigger three-state 20 SN74LS241
74x2424quad bus transceiver, inverting outputs schmitt-trigger three-state 14 [https://web.archive.org/web/20040608202058/http://focus.ti.com:80/lit/ds/symlink/sn74ls242.pdf SN74LS242]
74x2434quad bus transceiver, non-inverting outputs schmitt-trigger three-state 14 SN74LS243
74x2448octal buffer, non-inverting outputs schmitt-trigger three-state 20 SN74LS244
74x2458octal bus transceiver, non-inverting outputs schmitt-trigger three-state 20 SN74LS245
74x2461BCD to 7-segment decoder/driver open-collector 30 V 16 SN74246
74x2471BCD to 7-segment decoder/driver open-collector 15 V 16 SN74247
74x2481BCD to 7-segment decoder/driver open-collector, 2 kΩ pull-up 16 SN74248
74x2491BCD to 7-segment decoder/driver open-collector 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n879 SN74249]
74x25011 of 16 data selector/multiplexer three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n273 SN74AS250]
74x25118-line to 1-line data selector/multiplexer, complementary outputs three-state 16 SN74251
74x2532dual 4-line to 1-line data selector/multiplexer three-state 16 SN74LS253
74x2552dual 2-line to 4-line decoder/demultiplexer, inverting outputs three-state 16 [https://archive.org/stream/bitsavers_icMaster19_198675341/1977_IC_Master#page/n315 74LS255]
74x2562dual 4-bit addressable latch 16 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n161 MC74F256]
74x2574quad 2-line to 1-line data selector/multiplexer, non-inverting outputs three-state 16 SN74LS257B
74x2584quad 2-line to 1-line data selector/multiplexer, inverting outputs three-state 16 SN74LS258B
74x25918-bit addressable latch 16 SN74259
74x260 2 dual 5-input NOR gate 14 SN74LS260
74x261 1 2-bit by 4-bit parallel binary multiplier 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n921 SN74LS261]
74x262 1 5760-bit ROM (Teletext character set, 128 characters 5x9) three-state 20 [https://www.datasheetarchive.com/SN74S262N-datasheet.html SN74S262N]
74x264 1 look ahead carry generator 16 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n295 SN74AS264]
74x265 4 quad complementary output elements 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n927 SN74265]
74x266 4 quad 2-input XNOR gate open-collector 14 SN74LS266
74x2686hex D-type latches, common output control, common enable three-state 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n935 SN74S268]
74x26918-bit bidirectional binary counter 24 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n175 MC74F269]
74x27012048-bit ROM (512x4) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n181 SN74S270]
74x27112048-bit ROM (256x8) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n181 SN74S271]
74x27318-bit register, asynchronous clear 20 SN74273
74x27414-bit by 4-bit binary multiplier three-state 20 [https://archive.org/stream/bitsavers_tidataBookForDesignEngineers2ed_29954976/1981_The_TTL_Data_Book_For_Design_Engineers_2ed#page/n647 SN74S274]
74x27517-bit slice Wallace tree three-state 16 [https://archive.org/stream/bitsavers_tidataBookForDesignEngineers2ed_29954976/1981_The_TTL_Data_Book_For_Design_Engineers_2ed#page/n647 SN74S275]
74x2764quad J-Not-K edge-triggered flip-flops, separate clocks, common preset and clear 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n941 SN74276]
74x27814-bit cascadeable priority registers, latched data inputs 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n945 SN74278]
74x2794quad set-reset latch 16 SN74279
74x28019-bit odd/even parity bit generator/checker 14 SN74LS280
74x28114-bit parallel binary accumulator 24 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n959 SN74S281]
74x2821look-ahead carry generator, selectable carry inputs 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n309 SN74AS282]
74x28314-bit binary full adder (has carry in function) 16 SN74283
74x28414-bit by 4-bit parallel binary multiplier (low order 4 bits of product) 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n971 SN74284]
74x28514-bit by 4-bit parallel binary multiplier (high order 4 bits of product) 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n971 SN74285]
74x28619-bit parity generator/checker, bus driver parity I/O port 14 SN74AS286
74x28711024-bit PROM (256x4) three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S287]
74x2881256-bit PROM (32x8) three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S288]
74x289164-bit RAM (16x4), inverted outputs open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n191 SN74S289]
74x2901decade counter (separate divide-by-2 and divide-by-5 sections) 14 SN74290
74x2921programmable frequency divider/digital timer 16 SN74LS292
74x29314-bit binary counter (separate divide-by-2 and divide-by-8 sections) 14 SN74293
74x2941programmable frequency divider/digital timer 16 SN74LS294
74x29514-bit bidirectional shift register three-state 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n971 SN74LS295B]
74x2971digital phase-locked loop filter 16 SN74LS297
74x2984quad 2-input multiplexer, storage 16 SN74298
74x29918-bit bidirectional universal shift/storage register three-state 20 SN74LS299
Part number|74x300 – 74x399 Units Description Input Output Pins Datasheet
74x3001256-bit RAM (256x1) open-collector 16 [https://archive.org/details/TexasInstruments-TI-Data-TheTTLDataBookforDesignEngineersSecondEditionOCR/page/n135 SN74LS300A]
74x3011256-bit RAM (256x1) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n195 SN74S301]
74x302 1 256-bit RAM (256x1) open-collector 16 [https://archive.org/stream/bitsavers_tidataBook2ed05_2617547/05#page/n63 SN74LS302]
74x303 1 octal divide-by-2 clock driver, 2 outputs inverted 16 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n515 SN74AS303]
74x304 1 octal divide-by-2 clock driver 16 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n517 SN74AS304]
74x305 1 octal divide-by-2 clock driver, 4 outputs inverted 16 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n521 SN74AS305]
74x30911024-bit RAM (1024x1) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookmoryDataBook1975_9924035/The_Semiconductor_Memory_Data_Book_1975#page/n171 SN74S309]
74x3108octal buffer, inverting Schmitt-trigger three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n315 SN74LS310]
74x311 1 144-bit RAM (16x9) with output latch open-collector 20 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_20099339/1981_Fairchild_FAST_Data_Book#page/n303 74F311]
74x312 1 144-bit RAM (16x9) open-collector 20 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_20099339/1981_Fairchild_FAST_Data_Book#page/n303 74F312]
74x313 1 192-bit RAM (16x12) open-collector 20 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_20099339/1981_Fairchild_FAST_Data_Book#page/n303 74F313]
74x314 1 1024-bit RAM (1024x1) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n199 SN74LS314]
74x315 1 1024-bit RAM (1024x1) with power-down mode open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n199 SN74LS315]
74x316 1 256-bit RAM (64x4), common I/O open-collector 16 [https://web.archive.org/web/20181101135029/https://www.datasheetarchive.com/pdf/download.php?id=2efa1ada205a131215dab3426435b9f9627932&type=M&term=sn74ls216 SN74LS316]
74x317 1 256-bit RAM (64x4) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookuitsDataBook_32771470/1983_ALS_AL_Logic_Circuits_Data_Book#page/n221 SN74ALS317]
74x318 1 256-bit RAM (32x8) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookuitsDataBook_32771470/1983_ALS_AL_Logic_Circuits_Data_Book#page/n221 SN74ALS318]
74x319164-bit RAM (16x4) open-collector 16 [https://archive.org/stream/SupplementToTheTTLDataBookForDesignEngineers2ndEdition/Supplement%20to%20The%20TTL%20Data%20Book%20for%20Design%20Engineers_2nd_Edition#page/n5 SN74LS319]
74x3201crystal-controlled oscillator 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1013 SN74LS320]
74x3211crystal-controlled oscillators, F/2 and F/4 count-down outputs 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1013 SN74LS320]
74x32218-bit shift register, sign extend three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1013 SN74LS322A]
74x32318-bit bidirectional universal shift/storage register, synchronous clear three-state 20 SN74LS323
74x3241voltage-controlled oscillator (or crystal controlled), enable input, complementary outputs analog 14 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n443 SN74LS324]
74x3252dual voltage-controlled oscillator (or crystal controlled), complementary outputs analog 16 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n443 SN74LS325]
74x3262dual voltage-controlled oscillator (or crystal controlled), enable input, complementary outputs analog 16 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n443 SN74LS326]
74x3272dual voltage-controlled oscillator (or crystal controlled) analog 14 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n443 SN74LS327]
74x3301 PLA (12 inputs, 50 terms, 6 outputs) three-state 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n231 SN74S330]
74x3311 PLA (12 inputs, 50 terms, 6 outputs) open-collector, 2.5 kΩ pull-up 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n231 SN74S331]
74x333 1 PLA (12 inputs, 32 terms, 6 outputs, 4 state registers) three-state 24 [https://web.archive.org/web/20181110150641/https://www.datasheetarchive.com/pdf/download.php?id=91d266471e851959724dec230b439f3590f791&type=M&term=SN74LS333 SN74LS333]
74x334 1 PLA (12 inputs, 32 terms, 6 outputs) three-state 24 [https://web.archive.org/web/20181110150641/https://www.datasheetarchive.com/pdf/download.php?id=91d266471e851959724dec230b439f3590f791&type=M&term=SN74LS333 SN74LS334]
74x335 1 PLA (12 inputs, 32 terms, 6 outputs, 4 state registers) open-collector 24 [https://web.archive.org/web/20181110150641/https://www.datasheetarchive.com/pdf/download.php?id=91d266471e851959724dec230b439f3590f791&type=M&term=SN74LS333 SN74LS335]
74x336 1 PLA (12 inputs, 32 terms, 6 outputs) open-collector 24 [https://web.archive.org/web/20181110150641/https://www.datasheetarchive.com/pdf/download.php?id=91d266471e851959724dec230b439f3590f791&type=M&term=SN74LS333 SN74LS336]
74x337 1 clock driver three-state 20 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n485 SN74ABT337]
74x3408octal buffer, inverting outputs Schmitt-trigger three-state 20 [https://archive.org/stream/bitsavers_tidataBookForDesignEngineers2ed_29954976/1981_The_TTL_Data_Book_For_Design_Engineers_2ed#page/n701 SN74S340]
74x3418octal buffer, non-inverting outputs Schmitt-trigger three-state 20 [https://archive.org/stream/bitsavers_tidataBookForDesignEngineers2ed_29954976/1981_The_TTL_Data_Book_For_Design_Engineers_2ed#page/n701 SN74S341]
74x3448octal buffer, non-inverting outputs Schmitt-trigger three-state 20 [https://archive.org/stream/bitsavers_tidataBookForDesignEngineers2ed_29954976/1981_The_TTL_Data_Book_For_Design_Engineers_2ed#page/n701 SN74S344]
74x3471BCD-to-7 segment decoders/drivers, low voltage version of 7447 open-collector 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1027 SN74LS347]
74x34818 to 3-line priority encoder three-state 16 SN74LS348
74x35014-bit shifter three-state 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1035 SN74S350]
74x3512dual 8-line to 1-line data selectors/multiplexers, 4 common data inputs three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1041 SN74351]
74x3522dual 4-line to 1-line data selectors/multiplexers, inverting outputs 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1045 SN74LS352]
74x3532dual 4-line to 1-line data selectors/multiplexers, inverting outputs three-state 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1047 SN74LS353]
74x35418-line to 1-line data selector/multiplexer, transparent registers three-state 20 CD74HC354
74x35518-line to 1-line data selector/multiplexer, transparent registers open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1051 SN74LS355]
74x35618-line to 1-line data selector/multiplexer, edge-triggered registers three-state 20 CD74HCT356
74x35718-line to 1-line data selector/multiplexer, edge-triggered registers open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1051 SN74LS357]
74x3611bubble memory function timing generator 22 [https://datasheet.datasheetarchive.com/originals/distributors/Datasheets-X2/DSA848000-290.pdf SN74LS361]
74x3621four-phase clock generator/driver for Texas Instruments TMS9900 20 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n457 SN74LS362]
74x3631octal transparent latch three-state 20 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n465 SN74LS363]
74x3641octal edge-triggered D-type register three-state 20 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n465 SN74LS364]
74x3656hex buffer, non-inverting outputs three-state 16 SN74LS365A
74x3666hex buffer, inverting outputs three-state 16 SN74LS366A
74x3676hex buffer, non-inverting outputs three-state 16 SN74LS367A
74x3686hex buffer, inverting outputs three-state 16 SN74LS368A
74x37012048-bit ROM (512x4) three-state 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n181 SN74S370]
74x37112048-bit ROM (256x8) three-state 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n181 SN74S371]
74x3738octal transparent latch three-state 20 SN74LS373
74x3748octal register three-state 20 SN74LS374
74x3754quad bistable latch 16 SN74LS375
74x3764quad J-Not-K flip-flop, common clock and common clear 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1081 SN74376]
74x37718-bit register, clock enable 20 SN74LS377
74x37816-bit register, clock enable 16 SN74LS378
74x37914-bit register, clock enable and complementary outputs 16 SN74LS379
74x38018-bit multifunction register three-state 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n193 SN74LS380]
74x38114-bit arithmetic logic unit/function generator, generate and propagate outputs 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1087 SN74LS381A]
74x38214-bit arithmetic logic unit/function generator, ripple carry and overflow outputs 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1087 SN74LS382]
74x383 1 8-bit register open-collector 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n433 SN74S383]
74x38418-bit by 1-bit two's complement multipliers 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1095 SN74LS384]
74x3854quad serial adder/subtractor 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1099 SN74LS385]
74x386 4 quad 2-input XOR gate 14 SN74LS386
74x38711024-bit PROM (256x4) open-collector 16 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S387]
74x388 1 4-bit D-type register three-state and standard 16 [https://web.archive.org/web/20181031205434/https://www.datasheetarchive.com/pdf/download.php?id=5d90911f81ff1f58d2ed9d41b54ff74e493bf1&type=O&term=74s388 Am74S388]
74x3902dual 4-bit decade counter 16 SN74LS390
74x3932dual 4-bit binary counter 14 SN74LS393
74x39514-bit cascadable shift register three-state 16 [https://web.archive.org/web/20070101063359/http://focus.ti.com:80/lit/ds/symlink/sn74ls395a.pdf SN74LS395A]
74x3968octal storage registers, parallel access 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1119 SN74LS396]
74x3984quad 2-input multiplexers, storage and complementary outputs 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1119 SN74LS398]
74x3994quad 2-input multiplexer, storage 16 SN74LS399
Part number|74x400 – 74x499 Units Description Input Output Pins Datasheet
74x401 1 CRC generator/checker 14 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n371 74F401]
74x402 1 serial data polynomial generator/checker 16 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n375 74F402]
74x403 1 64-bit FIFO memory (16x4) three-state 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n383 74F403]
74x4051 3-line to 8-line decoder (equivalent to Intel 8205) 16 UCY74S405
74x406 1 3-line to 8-line decoder{{?}}}}{{?}}}} 14 [https://archive.org/details/Digital_IC_Equivalents/page/n113 MC74406P]
74x407 1 data access register three-state 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n401 74F407]
74408 1 8-bit parity tree 14 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n407 MC74408]
74S4081 controller/driver for 16k/64k/256k dRAM 48 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n273 SN74S408]
74x4091 controller/driver for 16k/64k/256k dRAM 48 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n291 SN74S409]
74x410 1 64-bit RAM (16x4) with output register three-state 18 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n407 74F410]
74x411 1 FIFO RAM controller 40 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n357 74F411]
74x4121multi-mode buffered 8-bit latches (equivalent to Intel 3212/8212) three-state 24 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n247 SN74S412]
74x413 1 256-bit FIFO memory (64x4) 16 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n417 74F413]
74x414 1 interrupt priority controller for Intel 8080 (equivalent to Intel 8214) 24 UCY74S414
74416 1 modulo 10 counter, preload and clear inputs 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n409 MC74416]
74S416 1 4-bit bidirectional bus transceiver, non-inverting (equivalent to Intel 8216) three-state 16 UCY74S416
74x417 2 modulo 2 and modulo 5 counters, common preload and clear inputs 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n409 MC74417]
74418 1 modulo 16 counter, preload and clear inputs 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n409 MC74418]
74F418 1 32-bit error detection and correction circuit three-state 48 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n375 74F418]
74419 2 dual modulo 4 counters, common preload and clear inputs 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n411 MC74419]
74S419 1 FIFO RAM controller 40 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n727 74S419]
74x420 1 32-bit check bit / syndrome bit generator three-state 48 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n421 74F420]
74x4221retriggerable monostable multivibrators, two inputs 14 SN74LS422
74x4232dual retriggerable monostable multivibrator 16 SN74LS423
74x4241two-phase clock generator/driver for Intel 8080 (equivalent to Intel 8224) 16 [https://archive.org/stream/bitsavers_tidataBook2ed07_23301973/07#page/n505 SN74LS424]
74x4254quad bus buffers, active low enables three-state 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1139 SN74425]
74x4264quad bus buffers, active high enables three-state 14 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1139 SN74426]
74x4281system controller for Intel 8080A (equivalent to Intel 8228) 28 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n253 SN74S428]
74x430 1 cyclic redundancy checker/corrector 28 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_20099339/1981_Fairchild_FAST_Data_Book#page/n309 74F430]
74x432 1 8-bit multi-mode buffered latch three-state 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n425 74F432]
74x433 1 256-bit FIFO memory (64x4) three-state 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n431 74F433]
74x4361line driver/memory driver circuits - MOS memory interface, damping output resistor 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1143 SN74S436]
74x4371line driver/memory driver circuits - MOS memory interface 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1143 SN74S437]
74x4381system controller for Intel 8080A (equivalent to Intel 8238) 28 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n253 SN74S438]
74x4404quad tridirectional bus transceiver, non-inverting outputs open-collector 20 [https://web.archive.org/web/20070102044619/http://focus.ti.com:80/lit/ds/symlink/sn74ls442.pdf SN74LS440]
74x4414quad tridirectional bus transceiver, inverting outputs open-collector 20 [https://web.archive.org/web/20070102044619/http://focus.ti.com:80/lit/ds/symlink/sn74ls442.pdf SN74LS441]
74x4424quad tridirectional bus transceiver, non-inverting outputs three-state 20 [https://web.archive.org/web/20070102044619/http://focus.ti.com:80/lit/ds/symlink/sn74ls442.pdf SN74LS442]
74x4434quad tridirectional bus transceiver, inverting outputs three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1147 SN74LS443]
74x4444quad tridirectional bus transceiver, inverting and non-inverting outputs three-state 20 [https://web.archive.org/web/20070102044619/http://focus.ti.com:80/lit/ds/symlink/sn74ls442.pdf SN74LS444]
74x4451BCD-to-decimal decoders/drivers driver 80 mA 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1153 SN74LS445]
74x4464quad bus transceivers, direction controls, inverting outputs three-state 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1155 SN74LS446]
74x4471BCD-to-7-segment decoders/drivers, low voltage version of 74247 open-collector 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1159 SN74LS447]
74x4484quad tridirectional bus transceiver, inverting and non-inverting outputs open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1147 SN74LS448]
74x4494quad bus transceivers, direction controls, non-inverting outputs three-state 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1155 SN74LS449]
74450 1 counter, latch, 7-segment decoder{{?}}}} open-collector 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n419 MC74450]
74S450 1 8192-bit PROM (1024x8) with power-down three-state 24 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n177 SN74S450]
74LS450116-to-1 multiplexer, complementary outputs 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n201 SN74LS450]
74S451 1 8192-bit PROM (1024x8) with power-down open-collector 24 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n177 SN74S451]
74LS4512dual 8-to-1 multiplexer 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n205 SN74LS451]
74x4522dual decade counter, synchronous{{?}}}}{{?}}}} 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n419 MC74452]
744532dual binary counter, synchronous{{?}}}}{{?}}}} 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n421 MC74453]
74LS4534quad 4-to-1 multiplexer 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n209 SN74LS453]
74x4542dual decade up/down counter, synchronous, preset input{{?}}}}{{?}}}} 24 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n421 MC74454]
744552dual binary up/down counter, synchronous, preset input{{?}}}}{{?}}}} 24 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n421 MC74455]
74F455 1 octal buffer / line driver with parity, inverting three-state 24 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n505 74F455]
74456 1 4-bit NBCD full adder{{?}}}}{{?}}}} 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n421 MC74456]
74F456 1 octal buffer / line driver with parity, non-inverting three-state 24 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n505 74F456]
74x458 1 nines complement / zero element{{?}}}}{{?}}}} 14 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n423 MC74458]
74460 1 4-bit bus transfer switch{{?}}}} three-state 16 [https://archive.org/details/bitsavers_motoroladauctorDataLibraryVol8Chips_17508458/page/n423 MC74460]
74LS460110-bit comparator 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n219 SN74LS460]
74x46118-bit presettable binary counter three-state 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n185 SN74LS461]
74x462 1 fiber-optic data-link transmitter open-collector 100 mA and standard 20 [https://web.archive.org/web/20181101013458/https://www.datasheetarchive.com/pdf/download.php?id=0c29064356e6a0d5bf87c3c57b67cf8fa5f023&type=O&term=TY-462 SN74LS462]
74x463 1 fiber-optic data-link receiver analog 20 [https://web.archive.org/web/20181101013458/https://www.datasheetarchive.com/pdf/download.php?id=0c29064356e6a0d5bf87c3c57b67cf8fa5f023&type=O&term=TY-462 SN74LS463]
74x4658octal buffer, non-inverting outputs three-state 20 [https://web.archive.org/web/20070101063029/http://focus.ti.com/lit/ds/symlink/sn74ls465.pdf SN74LS465]
74x4668octal buffers, inverting outputs three-state 20 [https://web.archive.org/web/20070101063029/http://focus.ti.com/lit/ds/symlink/sn74ls465.pdf SN74LS466]
74x4678octal buffers, non-inverting outputs three-state 20 [https://web.archive.org/web/20070101063029/http://focus.ti.com/lit/ds/symlink/sn74ls465.pdf SN74LS467]
74x4688octal buffers, inverting outputs three-state 20 [https://web.archive.org/web/20070101063029/http://focus.ti.com/lit/ds/symlink/sn74ls465.pdf SN74LS468]
74x46918-bit synchronous up/down counter, parallel load and hold capability three-state 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n191 SN74LS469]
74x47012048-bit PROM (256x8) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S470]
74x47112048-bit PROM (256x8) three-state 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S471]
74x47214096-bit PROM (512x8) three-state 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S472]
74x47314096-bit PROM (512x8) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S473]
74x47414096-bit PROM (512x8) three-state 24 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S474]
74x47514096-bit PROM (512x8) open-collector 24 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n173 SN74S475]
74x47614096-bit PROM (1024x4) three-state 18 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n177 SN74S476]
74x47714096-bit PROM (1024x4) open-collector 18 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n177 SN74S477]
74x47818192-bit PROM (1024x8) three-state 24 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n177 SN74S478]
74x47918192-bit PROM (1024x8) open-collector 24 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n177 SN74S479]
74x480 1 single burst error recovery circuit 24 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n727 SN74S480]
74x48114-bit slice cascadable processor elements (48) [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n15 SN74S481]
74x48214-bit slice expandable control elements 20 [https://archive.org/stream/bitsavers_tidataBookcomputerComponentsDataBook_16851665/1977_TI_Bipolar_Microcomputer_Components_Data_Book#page/n259 SN74S482]
74x4841BCD-to-binary converter three-state 20 [https://archive.org/stream/bitsavers_tidataBook1986_14886851/The_TTL_Data_Book_Vol_4_1986#page/n379 SN74S484A]
74x4851binary-to-BCD converter three-state 20 [https://archive.org/stream/bitsavers_tidataBook1986_14886851/The_TTL_Data_Book_Vol_4_1986#page/n379 SN74S485A]
74x488 1 IEEE-488 bus interface 48 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n261 74ACT488]
74x4902dual decade counter 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1167 SN74490]
74x491110-bit binary up/down counter, limited preset three-state 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n197 SN74LS491]
74x49818-bit bidirectional shift register, parallel inputs three-state 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n189 SN74LS498]
Part number|74x500 – 74x599 Units Description Input Output Pins Datasheet
74x500 1 6-bit flash analog-to-digital converter (ADC) analog 24 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n409 74F500]
74x502 1 8-bit successive approximation register 16 [https://archive.org/stream/bitsavers_fairchilddldTTLDataBook_39509923/1978_Fairchild_TTL_Data_Book#page/n497 74LS502]
74x503 1 8-bit successive approximation register with expansion control 16 [https://archive.org/stream/bitsavers_fairchilddldTTLDataBook_39509923/1978_Fairchild_TTL_Data_Book#page/n501 74LS503]
74x504 1 12-bit successive approximation register with expansion control 24 [https://archive.org/stream/bitsavers_fairchilddldTTLDataBook_39509923/1978_Fairchild_TTL_Data_Book#page/n505 74LS504]
74x505 1 8-bit successive approximation ADC analog three-state 24 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n413 74F505]
74x50818-bit multiplier/divider 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n289 SN74S508]
74x516 1 16-bit multiplier/divider 24 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n365 SN74S516]
74x51818-bit comparator 20 kΩ pull-up open-collector 20 SN74ALS518
74x51918-bit comparator open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n365 SN74ALS519]
74x52018-bit comparator, inverting output 20 kΩ pull-up 20 SN74ALS520
74x52118-bit comparator, inverting output 20 SN74ALS521
74x52218-bit comparator, inverting output 20 kΩ pull-up open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n365 SN74ALS522]
74x52418-bit registered comparator open-collector 20 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n449 74F524]
74x525 1 16-bit programmable counter 28 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n457 74F525]
74x5261fuse programmable identity comparator, 16-bit 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n371 SN74ALS526]
74x5271fuse programmable identity comparator, 8-bit + 4-bit conventional Identity comparator 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n371 SN74ALS527]
74x5281fuse programmable Identity comparator, 12-bit 16 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n371 SN74ALS528]
74x5318octal transparent latch three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n329 SN74S531]
74x5328octal register three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n329 SN74S532]
74x5331octal transparent latch, inverting outputs three-state 20 CD74HC533
74x5341octal register, inverting outputs three-state 20 CD74HC534
74x5351octal transparent latch, inverting outputs three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n331 SN74S535]
74x5361octal register, inverting outputs three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1982DatabookOCR#page/n331 SN74S536]
74x5371BCD to decimal decoder three-state 20 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n247 MC74F537]
74x5381 3-line to 8-line decoder/demultiplexer three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n389 SN74ALS538]
74x5392dual 2-line to 4-line decoder/demultiplexer three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n393 SN74ALS539]
74x5401inverting octal buffer schmitt-trigger three-state 20 SN74LS540
74x5411non-inverting octal buffer schmitt-trigger three-state 20 SN74LS541
74x5431octal registered transceiver, non-inverting three-state 24 SN74F543
74x5441 octal registered transceiver, inverting three-state 24 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n261 MC74F544]
74x545 1 octal bidirectional transceiver, non-inverting three-state 20 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n497 74F545]
74x546 1 8-bit bidirectional registered transceiver, non-inverting three-state 24 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n589 SN74LS546]
74LS547 1 8-bit bidirectional latched transceiver, non-inverting three-state 24 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n589 SN74LS547]
74F547 1 3-line to 8-line decoder/demultiplexer with address latches and acknowledge output 20 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n501 74F547]
74LS548 1 8-bit two-stage pipelined register three-state 24 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n637 SN74LS548]
74F548 1 3-line to 8-line decoder/demultiplexer with acknowledge output 20 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n505 74F548]
74x549 1 8-bit two-stage pipelined latch three-state 24 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n637 SN74LS549]
74x550 1 octal registered transceiver with status flags, non-inverting three-state 28 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n509 74F550]
74x551 1 octal registered transceiver with status flags, inverting three-state 28 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n509 74F551]
74x552 1 octal registered transceiver with parity and flags three-state 28 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n515 74F552]
74x556 1 16x16-bit multiplier slice three-state (84) [https://archive.org/details/bitsavers_mmidataBook7ed_126879625/page/n567 74S556]
74x55718-bit by 8-bit multiplier three-state 40 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n381 SN74S557]
74x55818-bit by 8-bit multiplier three-state 40 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n381 SN74S558]
74x559 1 8-bit expandable two's complement multiplier/divider three-state 24 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_20099339/1981_Fairchild_FAST_Data_Book#page/n311 74F559]
74x56014-bit decade counter three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n401 SN74ALS560A]
74x56114-bit binary counter three-state 20 [https://web.archive.org/web/20170305192612/http://www.ti.com/lit/ds/symlink/sn74als561a.pdf SN74ALS561A]
74x56318-bit D-type transparent latch, inverting outputs three-state 20 SN74ALS563B
74x56418-bit D-type edge-triggered register, inverting outputs three-state 20 SN74ALS564B
74x566 1 8-bit bidirectional registered transceiver, inverting three-state 24 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n589 SN74LS566]
74x567 1 8-bit bidirectional latched transceiver, inverting three-state 24 [https://archive.org/details/bitsavers_mmidataBook6ed_79579213/page/n589 SN74LS567]
74x5681decade up/down counter three-state 20 SN74ALS568A
74x5691binary up/down counter three-state 20 SN74ALS569A
74x570 1 2048-bit PROM (512x4) open-collector 16 [https://archive.org/stream/bitsavers_nationaldataBook_16727669/1980_Memory_Data_Book#page/n315 DM74S570]
74x571 1 2048-bit PROM (512x4) three-state 16 [https://archive.org/stream/bitsavers_nationaldataBook_16727669/1980_Memory_Data_Book#page/n315 DM74S571]
74x572 1 4096-bit PROM (1024x4) open-collector 18 [https://archive.org/stream/bitsavers_nationaldataBook_16727669/1980_Memory_Data_Book#page/n317 DM74S572]
74x5731octal D-type transparent latch three-state 20 SN74ALS573C
74x5741octal D-type edge-triggered flip-flop three-state 20 SN74BCT574
74x5751octal D-type edge-triggered flip-flop, synchronous clear three-state 24 SN74ALS575A
74x5761octal D-type edge-triggered flip-flop, inverting outputs three-state 20 SN74ALS576B
74x5771octal D-type edge-triggered flip-flop, synchronous clear, inverting outputs three-state 24 SN74ALS577A
74x579 1 8-bit bidirectional binary counter three-state 20 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n273 MC74F579]
74x5801octal D-type transparent latch, inverting outputs three-state 20 SN74ALS580B
74x582 1 4-bit BCD arithmetic logic unit 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n551 74F582]
74x583 1 4-bit BCD adder 16 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n555 74F583]
74x588 1 octal bidirectional transceiver with IEEE-488 termination resistors three-state 20 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n559 74F588]
74x58918-bit shift register, input latch three-state 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1181 SN74LS589]
74x59018-bit binary counter, output registers three-state 16 SN74LS590
74x59118-bit binary counter, output registers open-collector 16 SN74LS591
74x59218-bit binary counter, input registers 16 SN74LS592
74x59318-bit binary counter, input registers three-state 20 SN74LS593
74x59418-bit shift registers, output latches 16 SN74LS594
74x59518-bit shift registers, output latches, parallel outputs three-state 16 SN74LS595
74x59618-bit shift registers, output latches, parallel outputs open-collector 16 SN74LS596
74x59718-bit shift registers, input latches 16 SN74LS597
74x59818-bit shift register, input latches three-state 20 SN74LS598
74x59918-bit shift registers, output latches open-collector 16 SN74LS599
Part number|74x600 – 74x699 Units Description Input Output Pins Datasheet
74x6001dynamic memory refresh controller, transparent and burst modes, for 4K or 16K dRAM three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1217 SN74LS600A]
74x6011dynamic memory refresh controller, transparent and burst modes, for 64K dRAM three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1217 SN74LS601A]
74x6021dynamic memory refresh controller, cycle steal and burst modes, for 4K or 16K dRAM three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1217 SN74LS602A]
74x6031dynamic memory refresh controller, cycle steal and burst modes, for 64K dRAM three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1217 SN74LS603A]
74x6041octal 2-input multiplexer, latch, high-speed three-state 28 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1225 SN74LS604]
74x6051octal 2-input multiplexer, latch, high-speed open-collector 28 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1225 SN74LS605]
74x6061octal 2-input multiplexer, latch, glitch-free three-state 28 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1225 SN74LS606]
74x6071octal 2-input multiplexer, latch, glitch-free open-collector 28 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1225 SN74LS607]
74x6081memory cycle controller 16 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1231 SN74LS608]
74x6101memory mapper, latched three-state 40 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1237 SN74LS610]
74x6111memory mapper, latched open-collector 40 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1237 SN74LS611]
74x6121memory mapper three-state 40 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1237 SN74LS612]
74x6131memory mapper open-collector 40 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1237 SN74LS613]
74x614 1 octal bus transceiver and register, inverting open-collector 24 [https://archive.org/details/bitsavers_tidataBooktaBook_60160366/page/n495 SN74ALS614]
74x615 1 octal bus transceiver and register, non-inverting open-collector 24 [https://archive.org/details/bitsavers_tidataBooktaBook_60160366/page/n495 SN74ALS615]
74x616 1 16-bit parallel error detection and correction three-state 40 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n101 SN74ALS616]
74x617 1 16-bit parallel error detection and correction open-collector 40 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n101 SN74ALS617]
74x6201octal bus transceiver, inverting three-state 20 SN74LS620
74x6211octal bus transceiver, non-inverting open-collector 20 SN74LS621
74x6221octal bus transceiver, inverting open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1247 SN74LS622]
74x6231octal bus transceiver, non-inverting three-state 20 SN74LS623
74x6241voltage-controlled oscillator, enable control, range control, two-phase outputs analog 14 SN74LS624
74x6252dual voltage-controlled oscillator, two-phase outputs analog 16 SN74LS625
74x6262dual voltage-controlled oscillator, enable control, two-phase outputs analog 16 SN74LS626
74x6272dual voltage-controlled oscillator analog 14 SN74LS627
74x6281voltage-controlled oscillator, enable control, range control,
external temperature compensation, two-phase outputs
analog 14 SN74LS628
74x6292dual voltage-controlled oscillator, enable control, range control analog 16 SN74LS629
74x630116-bit error detection and correction (EDAC) three-state 28 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1263 SN74LS630]
74x631116-bit error detection and correction open-collector 28 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1263 SN74LS631]
74x632132-bit parallel error detection and correction, byte-write three-state 52 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n457 SN74ALS632]
74x633132-bit parallel error detection and correction, byte-write open-collector 52 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n457 SN74ALS633]
74x634132-bit parallel error detection and correction three-state 48 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n457 SN74ALS634]
74x635132-bit parallel error detection and correction open-collector 48 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n457 SN74ALS635]
74x636 1 8-bit parallel error detection and correction three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1271 SN74LS636]
74x637 1 8-bit parallel error detection and correction open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1271 SN74LS637]
74x6381octal bus transceiver, inverting outputs three-state and open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1279 SN74LS638]
74x6391octal bus transceiver, non-inverting outputs three-state and open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1279 SN74LS639]
74x6401octal bus transceiver, inverting outputs three-state 20 SN74LS640
74x6411octal bus transceiver, non-inverting outputs open-collector 20 SN74LS641
74x6421octal bus transceiver, inverting outputs open-collector 20 SN74LS642
74x6431octal bus transceiver, mix of inverting and non-inverting outputs three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1283 SN74LS643]
74x6441octal bus transceiver, mix of inverting and non-inverting outputs open-collector 20 SN74LS644
74x6451octal bus transceiver, non-inverting outputs three-state 20 SN74LS645
74x6461octal bus transceiver/latch/multiplexer, non-inverting outputs three-state 24 SN74ALS646A
74x6471octal bus transceiver/latch/multiplexer, non-inverting outputs open-collector 24 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1291 SN74LS647]
74x6481octal bus transceiver/latch/multiplexer, inverting outputs three-state 24 SN74ALS648A
74x6491octal bus transceiver/latch/multiplexer, inverting outputs open-collector 24 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1291 SN74LS649]
74x6511octal bus transceiver/register, inverting outputs three-state 24 SN74ALS651A
74x6521octal bus transceiver/register, non-inverting outputs three-state 24 SN74ALS652A
74x6531octal bus transceiver/register, inverting outputs three-state and open-collector 24 SN74ALS653
74x6541octal bus transceiver/register, non-inverting outputs three-state and open-collector 24 SN74ALS654
74x655 1 octal buffer / line driver with parity, inverting three-state 24 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n553 74F655]
74x656 1 octal buffer / line driver with parity, non-inverting three-state 24 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n553 74F656]
74x657 1 octal bidirectional transceiver with 8-bit parity generator/checker three-state 24 SN74F657
74x6581octal bus transceiver, parity, inverting three-state 24 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n395 SN74HC658]
74x6591octal bus transceiver, parity, non-inverting three-state 24 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n395 SN74HC658]
74x6641octal bus transceiver, parity, inverting three-state 24 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n409 SN74HC664]
74x6651octal bus transceiver, parity, non-inverting three-state 24 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n409 SN74HC665]
74x666 1 8-bit D-type transparent read-back latch, non-inverting three-state 24 SN74ALS666
74x667 1 8-bit D-type transparent read-back latch, inverting three-state 24 SN74ALS667
74x6681synchronous 4-bit decade up/down counter 16 [https://web.archive.org/web/20060602131759/http://focus.ti.com/lit/ds/symlink/sn74ls669.pdf SN74LS668]
74x6691synchronous 4-bit binary up/down counter 16 [https://web.archive.org/web/20060602131759/http://focus.ti.com/lit/ds/symlink/sn74ls669.pdf SN74LS669]
74x6701 16-bit register file (4x4) three-state 16 SN74LS670
74x67114-bit bidirectional shift register/latch/multiplexer, direct clear three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1327 SN74LS671]
74x67214-bit bidirectional shift register/latch/multiplexer, synchronous clear three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1327 SN74LS672]
74x673116-bit serial-in, serial/parallel-out shift register, output storage registers three-state 24 SN74LS673
74x674116-bit parallel-in, serial-out shift register three-state 24 SN74LS674
74x675 1 16-bit serial-in, serial/parallel-out shift register 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n607 74F675A]
74x676116-bit serial/parallel-in, serial-out shift register 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n611 74F676]
74x677116-bit address comparator, enable 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n507 SN74ALS677]
74x678116-bit address comparator, latch 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n507 SN74ALS678]
74x679112-bit address comparator, latch 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n513 SN74ALS679]
74x680112-bit address comparator, enable 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n513 SN74ALS680]
74x68114-bit parallel binary accumulator three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1339 SN74LS681]
74x68218-bit magnitude comparator, P>Q output 20 kΩ pull-up 20 [https://web.archive.org/web/20160531200122/http://www.ti.com/lit/ds/symlink/sn74ls682.pdf SN74LS682]
74x68318-bit magnitude comparator, P>Q output 20 kΩ pull-up open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1345 SN74LS683]
74x68418-bit magnitude comparator, P>Q output 20 [https://web.archive.org/web/20160531200122/http://www.ti.com/lit/ds/symlink/sn74ls682.pdf SN74LS684]
74x68518-bit magnitude comparator, P>Q output open-collector 20 [https://web.archive.org/web/20160531200122/http://www.ti.com/lit/ds/symlink/sn74ls682.pdf SN74LS685]
74x68618-bit magnitude comparator, P>Q output, enable 24 [https://web.archive.org/web/20160531200122/http://www.ti.com/lit/ds/symlink/sn74ls682.pdf SN74LS686]
74x68718-bit magnitude comparator, P>Q output, enable open-collector 24 [https://web.archive.org/web/20160531200122/http://www.ti.com/lit/ds/symlink/sn74ls682.pdf SN74LS687]
74x68818-bit magnitude comparator, enable 20 [https://web.archive.org/web/20160531200122/http://www.ti.com/lit/ds/symlink/sn74ls682.pdf SN74LS688]
74x68918-bit magnitude comparator, enable open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1345 SN74LS689]
74x69014-bit decimal counter/latch/multiplexer, asynchronous clear three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1353 SN74LS690]
74x69114-bit binary counter/latch/multiplexer, asynchronous clear three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1353 SN74LS691]
74x69214-bit decimal counter/latch/multiplexer, synchronous clear three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1353 SN74LS692]
74x69314-bit binary counter/latch/multiplexer, synchronous clear three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1353 SN74LS693]
74x694 1 4-bit decimal counter/latch/multiplexer, synchronous and asynchronous clears three-state 20 [https://archive.org/details/bitsavers_icMaster19_159569496/page/n619 SN74ALS694]
74x695 1 4-bit binary counter/latch/multiplexer, synchronous and asynchronous clears three-state 20 [https://archive.org/details/bitsavers_icMaster19_159569496/page/n619 SN74ALS695]
74x69614-bit decimal counter/register/multiplexer, asynchronous clear three-state 20 SN74LS696
74x69714-bit binary counter/register/multiplexer, asynchronous clear three-state 20 SN74LS697
74x69814-bit decimal counter/register/multiplexer, synchronous clear three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol2_45945352/1985_The_TTL_Data_Book_Vol_2#page/n1365 SN74LS698]
74x69914-bit binary counter/register/multiplexer, synchronous clear three-state 20 SN74LS699
Part number|74x700 – 74x799 Units Description Input Output Pins Datasheet
74x700 1 octal dRAM driver, inverting three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n315 SN74S700]
74x701 1 8-bit register/counter/comparator three-state 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n615 74F701]
74x702 1 8-bit registered read-back transceiver three-state 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n617 74F702]
74x705 1 arithmetic logic unit for digital signal processing applications three-state (84) [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n349 74ACT705]
74x707 1 8-bit TTL-ECL shift register 20 [https://archive.org/details/bitsavers_nationaldaFASTDatabook_31226275/page/n621 74F707]
74x708 1 576-bit FIFO memory (64x9) three-state 28 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n361 74ACT708]
74x710 1 8-bit single-supply TTL-ECL shift register 20 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n621 74F710]
74x711 5 quint 2-to-1 multiplexers three-state 20 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n777 74F711]
74x712 5 quint 3-to-1 multiplexers 24 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n777 74F712]
74x7161programmable decade counter 16 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n397 SN74LS716]
74x7181programmable binary counter 16 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n397 SN74LS718]
74x723 1 576-bit FIFO memory (64x9) three-state 28 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n379 74ACT723]
74x7241voltage-controlled multivibrator analog 8 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n409 SN74LS724]
74x725 1 4608-bit FIFO memory (512x9) three-state 28 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n395 74ACT725]
74x730 1 octal dRAM driver, inverting three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n315 SN74S730]
74x731 1 octal dRAM driver, non-inverting three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n315 SN74S731]
74x732 1 4-bit 3-bus multiplexer, inverting three-state 20 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n789 74F732]
74x733 1 4-bit 3-bus multiplexer, non-inverting three-state 20 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n789 74F733]
74x734 1 octal dRAM driver, non-inverting three-state 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n315 SN74S734]
74x740 2 dual 4-bit line driver, inverting three-state 20 [https://web.archive.org/web/20181101182546/https://www.datasheetarchive.com/pdf/download.php?id=23e34acdadd4ddc3260f5855fdea5f42e31889&type=O&term=S741 SN74S740]
74x741 2 dual 4-bit line driver, non-inverting, complementary enable inputs three-state 20 [https://web.archive.org/web/20181101182546/https://www.datasheetarchive.com/pdf/download.php?id=23e34acdadd4ddc3260f5855fdea5f42e31889&type=O&term=S741 SN74S741]
74x744 2 dual 4-bit line driver, non-inverting three-state 20 [https://web.archive.org/web/20181101182546/https://www.datasheetarchive.com/pdf/download.php?id=23e34acdadd4ddc3260f5855fdea5f42e31889&type=O&term=S741 SN74S744]
74x746 1 octal buffer / line driver, inverting 20 kΩ pull-up three-state 20 [https://archive.org/details/bitsavers_tidataBooktaBook_60160366/page/n623 SN74ALS746]
74x747 1 octal buffer / line driver, non-inverting 20 kΩ pull-up three-state 20 [https://archive.org/details/bitsavers_tidataBooktaBook_60160366/page/n623 SN74ALS747]
74x74818 to 3-line priority encoder (glitch-less) 16 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n151 SN74LS748]
74x756 1 octal buffer/line driver, inverting outputs open-collector 20 SN74AS756
74x757 1 octal buffer/line driver, non-inverting outputs, complementary enable inputs open-collector 20 SN74AS757
74x758 1 quadruple bus transceivers, inverting outputs open-collector 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n527 SN74AS758]
74x759 1 quadruple bus transceivers, non-inverting outputs open-collector 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n527 SN74AS759]
74x7601octal buffer/line driver, non-inverting outputs open-collector 20 SN74ALS760
74x7621octal buffer/line driver, inverting and non-inverting outputs open-collector 20 [https://web.archive.org/web/20170224211619/http://www.ti.com/lit/ds/symlink/sn74as762.pdf SN74ALS762]
74x7631octal buffer/line driver, inverting outputs, complementary enable inputs open-collector 20 [https://web.archive.org/web/20170224211619/http://www.ti.com/lit/ds/symlink/sn74as762.pdf SN74ALS763]
74x764 1 dual-port dRAM controller 40 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n795 74F764]
74x765 1 dual-port dRAM controller with address latch 40 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n795 74F765]
74x776 1 8-bit latched transceiver for FutureBus three-state and open-collector 28 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n453 SN74F776]
74x77918-bit bidirectional binary counter three-state 16 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n297 MC74F779]
74x7831synchronous address multiplexer for display systems 40 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n411 SN74LS783]
74x784 1 8-bit serial/parallel multiplier with adder/subtractor 20 [https://archive.org/stream/bitsavers_fairchilddldFASTDataBook_29981933/1985_Fairchild_FAST_Data_Book#page/n583 74F784]
74x786 1 4-input asynchronous bus arbiter 16 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n835 74F786]
74x7901error detection and correction (EDAC) three-state 48 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n629 SN74ALS790]
74x79318-bit latch, readback 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n433 SN74LS793]
74x79418-bit register, readback 20 [https://archive.org/stream/MonolithicMemories-MMI-BipolarLSI1984DatabookOCR#page/n433 SN74LS794]
74x7951octal buffer, non-inverting, common enable three-state 20 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n437 SN74LS795]
74x7961octal buffer, inverting, common enable three-state 20 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n437 SN74LS796]
74x7971octal buffer, non-inverting, enable for 4 buffers each three-state 20 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n437 SN74LS797]
74x7981octal buffer, inverting, enable for 4 buffers each three-state 20 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n437 SN74LS798]
Part number|74x800 – 74x899 Units Description Input Output Pins Datasheet
74x800 3 triple 4-input AND/NAND drivers driver 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n537 SN74AS800]
74x802 3 triple 4-input OR/NOR drivers driver 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n541 SN74AS802]
74x803 4 quad D flip flops with matched propagation delays 14 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n301 MC74F803]
74x8046hex 2-input NAND drivers driver 20 SN74ALS804A
74x8056hex 2-input NOR drivers driver 20 SN74ALS805A
74x807 1 1-to-10 clock driver driver 20 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n569 IDT74FCT807]
74x8086hex 2-input AND drivers driver 20 SN74AS808B
74x8104quad 2-input XNOR gates 14 [https://web.archive.org/web/20170225141941/http://www.ti.com/lit/ds/symlink/sn74als810.pdf SN74ALS810]
74x811 4 quad 2-input XNOR gates open-collector 14 [https://archive.org/details/bitsavers_nationaldaicDatabook_22808448/page/n349 DM74ALS811]
74x818 1 8-bit diagnostic register three-state 24 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n411 74ACT818]
74x821 1 10-bit bus interface flip-flop three-state 24 SN74AS821A
74x822110-bit bus interface flip-flop, inverting inputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n557 SN74AS822]
74x82319-bit D-type flip-flops, clear and clock enable inputs three-state 24 SN74AS823A
74x82419-bit D-type flip-flops, clear and clock enable inputs, inverting inputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n563 SN74AS824]
74x82518-bit D-type flip-flop, clear and clock enable inputs three-state 24 SN74AS825A
74x82618-bit D-type flip-flop, clear and clock enable inputs, inverting inputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n569 SN74AS826]
74x827 1 10-bit buffer, non-inverting three-state 24 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n303 MC74F827]
74x828 1 10-bit buffer, inverting three-state 24 [https://archive.org/stream/bitsavers_motoroladaFASTandLSTTLData_35934218/1992_Motorola_FAST_and_LS_TTL_Data#page/n303 MC74F828]
74x8326hex 2-input OR drivers driver 20 [https://web.archive.org/web/20170221112630/http://www.ti.com/lit/ds/symlink/sn74als832a.pdf SN74ALS832A]
74x833 1 8-bit to 9-bit bus transceiver with parity register, non-inverting three-state 24 SN74ABT833
74x834 1 8-bit to 9-bit bus transceiver with parity register, inverting three-state 24 [https://archive.org/details/bitsavers_idtdataBoomanceCMOSDataBook_66222191/page/n1071 IDT74FCT834]
74x841110-bit D-type flip-flop three-state 24 [https://web.archive.org/web/20170225141931/http://www.ti.com/lit/ds/symlink/sn74als841.pdf SN74ALS841]
74x842110-bit D-type flip-flop, inverting inputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n579 SN74ALS842]
74x843 1 9-bit D flip-flops, clear and set inputs three-state 24 SN74ALS843
74x844 1 9-bit D flip-flops, clear and set inputs, inverting inputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n587 SN74ALS844]
74x845 1 8-bit D flip-flops, clear and set inputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n595 SN74ALS845]
74x846 1 8-bit D flip-flops, clear and set inputs, inverting inputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n595 SN74ALS846]
74x84818 to 3-line priority encoder (glitch-less) three-state 16 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n315 SN74LS848]
74x850 1 1 of 16 data selector/multiplexer, clocked select three-state 28 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n603 SN74AS850]
74x851 1 1 of 16 data selector/multiplexer three-state 28 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n603 SN74AS851]
74x852 1 8-bit universal transceiver port controller three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n613 SN74AS852]
74x853 1 8-bit to 9-bit bus transceiver with parity latch, non-inverting three-state 24 SN74ABT853
74x854 1 8-bit to 9-bit bus transceiver with parity latch, inverting three-state 24 [https://archive.org/details/bitsavers_idtdataBoomanceCMOSDataBook_66222191/page/n1071 IDT74FCT854]
74x856 1 8-bit universal transceiver port controller three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n619 SN74AS856]
74x8576hex 2-line to 1-line multiplexer three-state 24 SN74ALS857
74x861 1 10-bit bus transceiver, non-inverting three-state 24 [https://archive.org/stream/bitsavers_tidataBook_80793740/1993_TI_ABT_Data_Book#page/n263 SN74ABT861]
74x862 1 10-bit bus transceiver, inverting three-state 24 [https://archive.org/stream/bitsavers_tidataBook_80793740/1993_TI_ABT_Data_Book#page/n269 SN74ABT862]
74x863 1 9-bit bus transceiver, non-inverting three-state 24 [https://archive.org/stream/bitsavers_tidataBook_80793740/1993_TI_ABT_Data_Book#page/n273 SN74ABT863]
74x864 1 9-bit bus transceiver, inverting three-state 24 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n867 74F864]
74x866 1 8-bit magnitude comparator with latches 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n633 SN74AS866]
74x8671synchronous 8-bit up/down counter, asynchronous clear 24 SN74ALS867A
74x8691synchronous 8-bit up/down counter, synchronous clear 24 SN74ALS869
74x870 1dual 16x4 register files 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n645 SN74AS870]
74x871 1dual 16x4 register files 28 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n645 SN74AS871]
74x8732dual 4-bit transparent latch with clear three-state 24 SN74ALS873B
74x874 2 dual 4-bit edge-triggered D flip-flops with clear three-state 24 SN74ALS874
74x876 2 dual 4-bit edge-triggered D flip-flops with set, inverting outputs three-state 24 SN74ALS876
74x877 1 8-bit universal transceiver port controller three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n663 SN74AS877]
74x8782dual 4-bit D-type flip-flop, synchronous clear, non-inverting outputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n669 SN74ALS878]
74x8792dual 4-bit D-type flip-flop, synchronous clear, inverting outputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n669 SN74ALS879]
74x8802dual 4-bit transparent latch with clear, inverting outputs three-state 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n675 SN74ALS880]
74x8811 4-bit arithmetic logic unit 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n681 SN74AS881A]
74x882132-bit lookahead carry generator 24 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n683 SN74AS882]
74x88518-bit magnitude comparator 24 [https://web.archive.org/web/20170403014245/http://www.ti.com/lit/ds/symlink/sn74as885.pdf SN74AS885]
74x887 18-bit processor element (non-cascadable version of 74x888) (68) [https://archive.org/details/bitsavers_tidataBook_28346484/page/n277 SN74AS887]
74888|54888}} 74x88818-bit processor slice 64 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n325 SN74AS888]
74x889 18-bit processor slice (68) [https://archive.org/stream/bitsavers_tidataBookuitsDataBook_32771470/1983_ALS_AL_Logic_Circuits_Data_Book#page/n637 SN74AS889]
74x890 1 microoperation sequencer 64 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n375 SN74AS890]
74x891 1 microoperation sequencer (68) [https://archive.org/stream/bitsavers_tidataBookuitsDataBook_32771470/1983_ALS_AL_Logic_Circuits_Data_Book#page/n685 SN74AS891]
74x895 1 8-bit memory address generator (68) [https://archive.org/details/bitsavers_tidataBook_28346484/page/n393 SN74AS895]
74x897 1 16-bit parallel/serial barrel shifter (68) [https://archive.org/details/bitsavers_tidataBook_28346484/page/n443 SN74AS897A]
74x899 1 9-bit latchable transceiver with parity generator / checker three-state (28) [https://archive.org/details/bitsavers_nationaldaFACTDatabook_39311242/page/n431 74AC899]
Part number|74x900 – 74x999 Units Description Input Output Pins Datasheet
74x9016hex inverting TTL buffer 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n93 MM74C901]
74x9026hex non-inverting TTL buffer 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n93 MM74C902]
74x9036hex inverting PMOS buffer 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n93 MM74C903]
74x9046hex non-inverting PMOS buffer 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n93 MM74C904]
74x905112-bit successive approximation register 24 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n97 MM74C905]
74x9066hex open drain n-channel buffers open-collector 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n103 MM74C906]
74x9076hex open drain p-channel buffers{{sp}}}} 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n103 MM74C907]
74x9082dual 2-input NAND 30 V / 250 mA relay driver{{sp}}}} 8 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n105 MM74C908]
74x9094quad voltage comparator analog open-collector 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n109 MM74C909]
74x9101256-bit RAM (64x4) three-state 18 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n115 MM74C910]
74x91114-digit expandable display controller three-state 28 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n135 MM74C911]
74x91216-digit BCD display controller and driver three-state 28 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n135 MM74C912]
74x91316-digit BCD display controller and driver, no decimal point 24 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n135 MM74C913]
74x9146hex Schmitt trigger, extended input voltage Schmitt-trigger 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n117 MM74C914]
74x91517-segment to BCD converter three-state 18 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n141 MM74C915]
74x91716-digit hex display controller and driver three-state 28 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n1333 MM74C917]
74x9182dual 2-input NAND 30 V / 250 mA relay driver{{sp}}}} 14 [https://archive.org/stream/bitsavers_nationaldaCMOSIntegratedCircuits_16413029/1975_National_CMOS_Integrated_Circuits#page/n105 MM74C918]
74x9201 1024-bit RAM (256x4), separate data inputs and outputs three-state 22 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n145 MM74C920]
74x9211 1024-bit RAM (256x4) three-state 18 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n145 MM74C921]
74x922116-key encoder three-state 18 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n149 MM74C922]
74x923120-key encoder three-state 20 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n149 MM74C923]
74x92514-digit counter/display driver 16 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n155 MM74C925]
74x92614-digit decade counter/display driver, carry out and latch (up to 9999) 16 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n155 MM74C926]
74x92714-digit timer counter/display driver (up to 9599, intended as time elapsed, i.e. 9:59.9 min) 16 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n155 MM74C927]
74x92814-digit counter/display driver (up to 1999) 16 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n155 MM74C928]
74x92911024-bit RAM (1024x1), single chip select three-state 16 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n155 MM74C929]
74x93011024-bit RAM (1024x1), three chip selects three-state 18 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n155 MM74C930]
74x9321phase comparator 8 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n1305 MM74C932]
74x9331 7-bit address bus comparator 20 [https://archive.org/stream/NationalSemiconductor-CMOSDatabook1981#page/n5 MM74C933]
749341=ADC0829 ADC, see corresponding NSC datasheet
74x9351 ADC for 3.5-digit digital voltmeters, multiplexed 7-segment display outputs analog 28 [https://archive.org/stream/bitsavers_nationaldaCMOSDatabook_23595721/1977_National_CMOS_Databook#page/n163 MM74C935]
74x9361 ADC for 3.75-digit digital voltmeters, multiplexed 7-segment display outputs analog{{?}}}} [https://archive.org/details/bitsavers_nationaldaCMOSDatabook_23595721/page/n171 MM74C936]
74x9371 ADC for 3.5-digit digital voltmeters, multiplexed BCD outputs analog 24 [https://archive.org/details/bitsavers_nationaldaDataAcquisitionHandbook_38492992/page/n83 MM74C937]
74x9381 ADC for 3.75-digit digital voltmeters, multiplexed BCD outputs analog 24 [https://archive.org/details/bitsavers_nationaldaDataAcquisitionHandbook_38492992/page/n83 MM74C938]
74x940 1octal bus/line drivers/line receivers Schmitt-trigger three-state 20 [https://archive.org/stream/NationalSemiconductorLogicDatabook1981/National%20Semiconductor%20Logic%20Databook%201981#page/n161 DM74S940]
74x9411octal bus/line drivers/line receivers Schmitt-trigger three-state 20 [https://archive.org/stream/NationalSemiconductorLogicDatabook1981/National%20Semiconductor%20Logic%20Databook%201981#page/n161 DM74S941]
74x9421300 baud Bell 103 modem (+/- 5 V supply) 20 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n639 MM74HC942]
74x9431300 baud Bell 103 modem (single 5 V supply) 20 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n645 MM74HC943]
74x94514-digit up/down counter, decoder and LCD driver, output latch 40 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n1343 MM74C945]
74x94614.5-digit counter, decoder and LCD driver, leading zero blanking 40 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n1351 MM74C946]
74x94714-digit up/down counter, decoder and LCD driver, leading zero blanking 40 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n1343 MM74C947]
74x9481 8-bit ADC with 16-channel analog multiplexer analog three-state 40 [https://archive.org/details/bitsavers_nationaldaDataAcquisitionHandbook_38492992/page/n63 MM74C948]
74x9491 8-bit ADC with 8-channel analog multiplexer analog three-state 28 [https://archive.org/details/bitsavers_nationaldaCMOSDatabook_23595721/page/n173 MM74C949]
74x9501 8-bit ADC with 8-channel analog multiplexer and sample and hold analog three-state 28 [https://archive.org/details/bitsavers_nationaldaCMOSDatabook_23595721/page/n173 MM74C950]
74x9521dual rank 8-bit shift register, synchronous clear three-state 18 [https://archive.org/stream/NationalSemiconductorLogicDatabook1981/National%20Semiconductor%20Logic%20Databook%201981#page/n417 DM74LS952]
74C95614-digit,17-segment alpha-numeric LED display driver with memory and decoder 40 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n1357 MM74C956]
74BCT956 1 octal bus transceiver and latch three-state 24 [https://datasheetspdf.com/pdf-file/1271601/Texas/SN74BCT956/1 SN74BCT956]
74x9621dual rank 8-bit shift register, register exchange mode three-state 18 [https://archive.org/stream/NationalSemiconductorLogicDatabook1981/National%20Semiconductor%20Logic%20Databook%201981#page/n417 DM74LS962]
74x963 1 dual rank 8-bit shift register, synchronous clear three-state 20 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n461 SN74ALS963]
74x964 1 dual rank 8-bit shift register, synchronous and asynchronous clear three-state 20 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n461 SN74ALS964]
74x968 1 controller/driver for 16k/64k/256k/1M dRAM 52 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n655 74F968]
74x978 1 octal flip-flop with serial scanner 24 [https://archive.org/stream/NationalSemiconductor1988FASTAdvancedSchottkyDatabook/National%20Semiconductor%201988%20FAST%20Advanced%20Schottky%20Databook#page/n667 74F978]
74x979 1 9-bit registered transceiver with parity generator/checker for FutureBus three-state and open-collector (48) [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n447 SN74BCT979]
74x989 1 64-bit RAM (64x4) three-state 16 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n1313 MM74C989]
74x990 1 8-bit D-type transparent read-back latch, non-inverting three-state 20 SN74ALS990
74x991 1 8-bit D-type transparent read-back latch, inverting three-state 20 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n473 SN74ALS991]
74x99219-bit D-type transparent read-back latch, non-inverting three-state 24 SN74ALS992
74x993 19-bit D-type transparent read-back latch, inverting three-state 24 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n481 SN74ALS993]
74x994 1 10-bit D-type transparent read-back latch, non-inverting three-state 24 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n489 SN74ALS994]
74x995 1 10-bit D-type transparent read-back latch, inverting three-state 24 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n489 SN74ALS995]
74x99618-bit D-type edge-triggered read-back latch three-state 24 SN74ALS996
Part number|74x1000 – 74x3999 Units Description Input Output Pins Datasheet
74x1000 4 quad 2-input NAND gate driver 14 SN74AS1000A
74x1002 4 quad 2-input NOR gate driver 14 SN74ALS1002A
74x1003 4 quad 2-input NAND gate open-collector driver 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n701 SN74ALS1003A]
74x10046hex inverting buffer driver 14 SN74ALS1004
74x10056hex inverting buffer open-collector driver 14 SN74ALS1005
74x10084quad 2-input AND gate driver 14 SN74AS1008A
74ALS10103triple 3-input NAND gate driver 14 [https://web.archive.org/web/20170225141918/http://www.ti.com/lit/ds/symlink/sn74als1010a.pdf SN74ALS1010A]
74AC1010
74ACT1010
1 16x16-bit multiplier/accumulator three-state 64 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n457 74AC1010]
74x10113triple 3-input AND gate driver 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n715 SN74ALS1011A]
74F1016 16 16-bit Schottky diode R-C bus termination array{{sp}}}} (20) SN74F1016
74AC1016
74ACT1016
1 16x16-bit multiplier three-state 64 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n467 74AC1016]
74x1017 1 16x16-bit parallel multiplier three-state 64 [https://archive.org/stream/bitsavers_fairchilddldFACTLogicDataBook_27153725/1987_Fairchild_FACT_Logic_Data_Book#page/n479 74AC1017]
74x1020 2 dual 4-input NAND gate driver 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n717 SN74ALS1020A]
74x1032 4 quad 2-input OR gate driver 14 [https://web.archive.org/web/20170221113739/http://www.ti.com/lit/ds/symlink/sn74as1032a.pdf SN74AS1032A]
74x10346hex non-inverting buffer driver 14 SN74ALS1034
74x10356hex non-inverting buffer open-collector driver 14 SN74ALS1035
74x1036 4 quad 2-input NOR gate driver 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n729 SN74ALS1036]
74x1050 12 12-bit Schottky diode bus termination array, clamp to GND{{sp}}}} 16 SN74S1050
74x1051 12 12-bit Schottky diode bus termination array, clamp to GND/VCC{{sp}}}} 16 SN74S1051
74x1052 16 16-bit Schottky diode bus termination array, clamp to GND{{sp}}}} 20 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n471 SN74S1052]
74x1053 16 16-bit Schottky diode bus termination array, clamp to GND/VCC{{sp}}}} 20 SN74S1053
74x1056 8 8-bit Schottky diode bus termination array, clamp to GND{{sp}}}} (16) SN74F1056
74x1071 10 10-bit bus termination array with bus-hold function (14) SN74ACT1071
74x1073 16 16-bit bus termination array with bus-hold function (20) SN74ACT1073
74x1181 1 4-bit arithmetic logic unit 24 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n503 SN74AS1181]
74x1240 1 octal buffer / line driver, inverting (lower-power version of 74x240) three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n731 SN74ALS1240]
74x1241 1 octal buffer / line driver, non-inverting (lower-power version of 74x241) three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n731 SN74ALS1241]
74x1242 1 quad bus transceiver, inverting (lower-power version of 74x242) three-state 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n735 SN74ALS1242]
74x1243 1 quad bus transceiver, non-inverting (lower-power version of 74x243) three-state 14 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n735 SN74ALS1243]
74x1244 1 octal buffer / driver, non-inverting (lower-power version of 74x244) three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n739 SN74ALS1244]
74x12451octal bus transceiver (lower-power version of 74x245) three-state 20 SN74ALS1245A
74x1280 1 9-bit parity generator/checker with registered outputs three-state 20 [https://web.archive.org/web/20181117162114/https://4donline.ihs.com/images/VipMasterIC/IC/QSEM/QSEMD004/QSEMD004-3-71.pdf QS74FCT1280]
74x1284 1 parallel printer interface transceiver / buffer (IEEE 1284) 20 74HCT1284
74x1616 1 16x16-bit multimode multiplier three-state 64 [https://archive.org/details/bitsavers_icMaster19_159569496/page/n919 SN74ALS1616]
74x1620 1 octal bus transceiver, inverting three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n747 SN74ALS1620]
74x1621 1 octal bus transceiver, non-inverting open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n747 SN74ALS1621]
74x1622 1 octal bus transceiver, inverting open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n747 SN74ALS1622]
74x1623 1 octal bus transceiver, non-inverting three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n747 SN74ALS1623]
74x1638 1 octal bus transceiver, inverting (lower-power version of 74x638) three-state and open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n753 SN74ALS1638]
74x1639 1 octal bus transceiver, non-inverting (lower-power version of 74x639) three-state and open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n753 SN74ALS1639]
74x1640 1 octal bus transceiver, inverting (lower-power version of 74x640) three-state 20 SN74ALS1640A
74x1641 1 octal bus transceiver, non-inverting (lower-power version of 74x641) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n757 SN74ALS641]
74x1642 1 octal bus transceiver, inverting (lower-power version of 74x642) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n757 SN74ALS642]
74x1643 1 octal bus transceiver, inverting and non-inverting (lower-power version of 74x643) three-state 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n757 SN74ALS643]
74x1644 1 octal bus transceiver, inverting and non-inverting (lower-power version of 74x644) open-collector 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n757 SN74ALS644]
74x1645 1 octal bus transceiver, non-inverting (lower-power version of 74x645) three-state 20 SN74ALS1645A
74x1650 2 dual 9-bit Futurebus backplane transceiver three-state and open-collector (100) [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n689 SN74FB1650]
74x1761 1 dRAM and interrupt vector controller 48 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n911 74F1761]
74x1762 1 dRAM address controller 40 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n913 74F1762]
74x1763 1 single-port dRAM controller 48 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n915 74F1763]
74x1764 1 dual-port dRAM controller 48 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n917 74F1764]
74x1765 1 dual-port dRAM controller with address latch 48 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n917 74F1765]
74x1801 1 FM, MFM, and DM encoder / decoder, data rates up to 10 MHz 24 [https://web.archive.org/web/20181101135525/https://www.datasheetarchive.com/pdf/download.php?id=5917b4aab844ef62cfa84fb8ce4dcca9847bd7&type=O&term=74LS1801 74LS1801]
74x1802 1 SerDes with ECC and CRC, data rates up to 10 MHz three-state 48 [https://4donline.ihs.com/images/VipMasterIC/IC/SIGC/SIGCD005/SIGCD005-7-26.pdf 74LS1802]
74x1803 1 quad clock driver 14 [https://archive.org/details/bitsavers_motoroladaFASTandLSTTLData_35934218/page/n309 MC74F1803]
74x1804 6 hex 2-input NAND driver 20 [https://archive.org/details/bitsavers_nationaldaicDatabook_22808448/page/n639 DM74AS1804]
74x1805 6 hex 2-input NOR driver 20 [https://archive.org/details/bitsavers_nationaldaicDatabook_22808448/page/n641 DM74AS1805]
74x1808 6 hex 2-input AND driver 20 [https://archive.org/details/bitsavers_nationaldaicDatabook_22808448/page/n643 DM74AS1808]
74x1811 1 FM, MFM, and DM encoder / decoder, data rates up to 20 MHz 24 [https://4donline.ihs.com/images/VipMasterIC/IC/SIGC/SIGCD005/SIGCD005-7-36.pdf 74LS1811]
74x1812 1 SerDes with ECC and CRC, data rates up to 30 MHz three-state 48 [https://4donline.ihs.com/images/VipMasterIC/IC/SIGC/SIGCD005/SIGCD005-7-37.pdf 74LS1812]
74x1832 6 hex 2-input OR driver 20 [https://archive.org/details/bitsavers_nationaldaicDatabook_22808448/page/n645 DM74ALS1832]
74x2031 1 9-bit Futurebus address/data transceiver three-state and open-collector (48) [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n695 SN74FB2031]
74x2032 1 9-bit Futurebus competition transceiver three-state and open-collector (48) [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n701 SN74FB2032]
74x2033 1 8-bit Futurebus registered transceiver three-state and open-collector (52) [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n709 SN74FB2033]
74x2040 1 8-bit Futurebus transceiver three-state and open-collector (48) [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n719 SN74FB2040]
74x2041 1 7-bit Futurebus transceiver three-state and open-collector (52) [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n725 SN74FB2041]
74x2151 1 8-line to 1-line multiplexer 25 Ω series resistor (16) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n187 CD74FCT2151]
74x2153 2 dual 4-line to 1-line multiplexer 25 Ω series resistor (16) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n191 CD74FCT2153]
74x2157 4 quad 2-line to 1-line multiplexer 25 Ω series resistor (16) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n197 CD74FCT2157]
74x2161 1 synchronous presettable 4-bit binary counter, asynchronous clear 25 Ω series resistor 16 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n313 QS74FCT2161T]
74x2163 1 synchronous presettable 4-bit binary counter, synchronous clear 25 Ω series resistor 16 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n313 QS74FCT2163T]
74x2191 1 synchronous presettable 4-bit binary up/down counter, common clock 25 Ω series resistor 16 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n321 QS74FCT2191T]
74x2193 1 synchronous presettable 4-bit binary counter, separate up/down clocks 25 Ω series resistor 16 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n329 QS74FCT2193T]
74x2226 2 dual 64-bit FIFO memories (64x1) (24) SN74ACT2226
74x2227 2 dual 64-bit FIFO memories (64x1) three-state (28) SN74ACT2227
74x2228 2 dual 256-bit FIFO memories (256x1) (24) SN74ACT2228
74x2229 2 dual 256-bit FIFO memories (256x1) three-state (28) SN74ACT2229
74x2232 1 512-bit FIFO memory (64x8) three-state 24 [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n167 SN74ALS2232A]
74x2233 1 576-bit FIFO memory (64x9) three-state 28 [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n175 SN74ALS2233A]
74x2235 1 18432-bit bidirectional FIFO memory (2x1024x9) three-state (44) [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n203 SN74ACT2235]
74x2236 1 18432-bit bidirectional FIFO memory (2x1024x9) three-state (44) [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n215 SN74ACT2236]
74x2238 1 576-bit bidirectional FIFO memory (2x32x9) three-state 40 [https://archive.org/stream/bitsavers_tidataBookeFIFOMemoriesDatabook_63352841/1996_High-Performance_FIFO_Memories_Databook#page/n157 SN74ALS2238]
74x2240 2 dual 4-bit bidirectional buffer / line driver, inverting three-state, 25 Ω series resistor 20 [https://archive.org/details/bitsavers_tidataBookerfaceLogicDataBook_4501982/page/n81 SN74BCT2240]
74x2241 2 dual 4-bit bidirectional buffer / line driver, non-inverting three-state, 25 Ω series resistor 20 [https://archive.org/details/bitsavers_tidataBookerfaceLogicDataBook_4501982/page/n85 SN74BCT2241]
74x2242 1 4-bit bus transceiver, inverting three-state, 25 Ω series resistor 14 [https://archive.org/details/bitsavers_tidataBooktaBook_60160366/page/n951 SN74ALS2242]
74x2244 2 dual 4-bit buffer / line driver, non-inverting three-state, 25 Ω series resistor 20 [https://archive.org/details/bitsavers_tidataBookerfaceLogicDataBook_4501982/page/n89 SN74BCT2244]
74x2245 1 octal bus transceiver three-state, 25 Ω series resistor 20 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n599 SN74ABT2245]
74x2253 2 dual 4-line to 1-line multiplexer three-state, 25 Ω series resistor (16) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n191 CD74FCT2253]
74x2257 4 quad 2-line to 1-line multiplexer three-state, 25 Ω series resistor (16) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n197 CD74FCT2257]
74x2273 8 octal D-type flip-flop with common clock and reset 25 Ω series resistor (20) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n215 CD74FCT2273]
74x2299 1 8-bit universal shift register three-state, 25 Ω series resistor 20 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n363 QS74FCT2299T]
74x2373 1 8-bit transparent latch three-state, 25 Ω series resistor (20) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n219 CD74FCT2373]
74x2374 8 octal D-type flip-flop with common clock three-state, 25 Ω series resistor (20) [https://archive.org/details/bitsavers_harrisdataCTLogic_25505286/page/n227 CD74FCT2374]
74x2377 1 8-bit register with clock enable 25 Ω series resistor 20 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n381 QS74FCT2377T]
74x2410 1 11-bit MOS memory driver, non-inverting three-state, 25 Ω series resistor 28 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n747 SN74BCT2410]
74x2411 1 11-bit MOS memory driver, inverting three-state, 25 Ω series resistor 28 [https://archive.org/details/TexasInstruments-TI-Data-AdvancedLogicandBusInterfaceLogic1991OCR/page/n749 SN74BCT2411]
74x2420 1 16-bit NuBus address/data transceiver and register three-state (68) [https://archive.org/details/bitsavers_tidataBookProducts_10042209/page/n29 SN74BCT2420]
74x2423 1 16-bit latched multiplexer/demultiplexer NuBus transceiver, inverting three-state (68) [https://archive.org/details/bitsavers_tidataBookProducts_10042209/page/n39 SN74BCT2423]
74x2424 1 16-bit latched multiplexer/demultiplexer NuBus transceiver, non-inverting three-state (68) [https://archive.org/details/bitsavers_tidataBookProducts_10042209/page/n39 SN74BCT2424]
74x2425 1 Macintosh Coprocessor Platform NuBus address/data registered transceiver three-state (100) [https://archive.org/details/bitsavers_tidataBookProducts_10042209/page/n49 SN74BCT2425]
74x2440 1 NuBus interface controller (68) [https://archive.org/details/bitsavers_tidataBookProducts_10042209/page/n61 SN74ACT2440]
74x2441 1 NuBus interface controller (100) [https://archive.org/details/bitsavers_tidataBookProducts_10042209/page/n93 SN74ACT2441]
74x2442 1 NuBus block slave address generator three-state (20) [https://archive.org/details/bitsavers_tidataBookProducts_10042209/page/n145 SN74ALS2442]
74x2525 1 8-output clock driver 14 [https://archive.org/details/bitsavers_nationaldaFACTDatabook_39311242/page/n443 74AC2525]
74x2526 1 8-output clock driver with input multiplexer 16 [https://archive.org/details/bitsavers_nationaldaFACTDatabook_39311242/page/n443 74AC2526]
74x2533 1 8-bit bus interface latch, inverting three-state, 25 Ω series resistor 20 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n369 QS74FCT2533T]
74x2534 1 8-bit bus interface register, inverting three-state, 25 Ω series resistor 20 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n375 QS74FCT2534T]
74x2540 1 8-bit buffer / line driver, inverting three-state, 25 Ω series resistor 20 [https://archive.org/details/bitsavers_tidataBooktaBook_60160366/page/n955 SN74ALS2540]
74x2541 1 8-bit buffer / line driver, non-inverting three-state, 25 Ω series resistor 20 [https://archive.org/details/bitsavers_tidataBooktaBook_60160366/page/n955 SN74ALS2541]
74x2543 1 8-bit latched transceiver, non-inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n399 QS74FCT2543T]
74x2544 1 8-bit latched transceiver, inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n399 QS74FCT2544T]
74x2573 1 8-bit transparent latch three-state, 25 Ω series resistor 20 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n407 QS74FCT2573T]
74x2574 8 octal D-type flip-flop with common clock three-state, 25 Ω series resistor 20 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n413 QS74FCT2574T]
74x2620 1 octal bus transceiver / MOS driver, inverting three-state, 25 Ω series resistor 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n763 SN74AS2620]
74x2623 1 octal bus transceiver / MOS driver, non-inverting three-state, 25 Ω series resistor 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n763 SN74AS2623]
74x2640 1 octal bus transceiver / MOS driver, inverting three-state, 25 Ω series resistor 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n767 SN74AS2640]
74x2645 1 octal bus transceiver / MOS driver, non-inverting three-state, 25 Ω series resistor 20 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n767 SN74AS2645]
74x2646 1 octal registered transceiver, non-inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n419 QS74FCT2646T]
74x2648 1 octal registered transceiver, inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n419 QS74FCT2648T]
74x2651 1 octal registered transceiver, inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n427 QS74FCT2651T]
74x2652 1 octal registered transceiver, non-inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n427 QS74FCT2652T]
74x2708 1 576-bit FIFO memory (64x9) three-state 28 [https://archive.org/details/bitsavers_nationaldaFACTDatabook_39311242/page/n445 74AC2708]
74x2725 1 4608-bit FIFO memory (512x9) 28 [https://archive.org/details/bitsavers_nationaldaFACTDatabook_39311242/page/n461 74ACT2725]
74x2726 1 4608-bit bidirectional FIFO memory (512x9) 28 [https://archive.org/details/bitsavers_nationaldaFACTDatabook_39311242/page/n461 74ACT2726]
74x2821 1 10-bit D-type flip-flop three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n435 QS74FCT2821T]
74x2823 1 9-bit D-type flip-flop with clear three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n435 QS74FCT2823T]
74x2825 1 8-bit D-type flip-flop with clear and clock enable three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n435 QS74FCT2825T]
74x2827 1 10-bit buffer, non-inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/bitsavers_tidataBookerfaceLogicDataBook_4501982/page/n93 SN74BCT2827A]
74x2828 1 10-bit buffer, inverting three-state, 25 Ω series resistor 24 [https://archive.org/details/bitsavers_tidataBookerfaceLogicDataBook_4501982/page/n93 SN74BCT2828A]
74x2833 1 8-bit bus transceiver with parity error flip-flop three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n451 QS74FCT2833T]
74x2841 1 10-bit transparent latch three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n453 QS74FCT2841T]
74x2843 1 9-bit transparent latch with asynchronous reset three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n453 QS74FCT2843T]
74x2845 1 8-bit transparent latch with asynchronous reset and multiple output enable three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n453 QS74FCT2845T]
74x2853 1 8-bit bus transceiver with parity error latch three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n451 QS74FCT2853T]
74x2861 1 10-bit non-inverting bus transceiver three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n463 QS74FCT2861T]
74x2862 1 10-bit inverting bus transceiver three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n463 QS74FCT2862T]
74x2863 1 9-bit non-inverting bus transceiver with dual output enable three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n463 QS74FCT2863T]
74x2864 1 9-bit inverting bus transceiver with dual output enable three-state, 25 Ω series resistor 24 [https://archive.org/details/QualitySemiconductor-1991DatabookOCR/page/n463 QS74FCT2864T]
74x2952 1 octal bus transceiver and register, non-inverting three-state 24 [https://archive.org/stream/TexasInstrumentsLVCAndLVDataBook1998/Texas_Instruments_LVC_and_LV_Data_Book_1998#page/n391 SN74LVC2952A]
74x2953 1 octal bus transceiver and register, inverting three-state 24 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n945 74F2953]
742960}}1error detection and correction (EDAC), equivalent to Am2960 three-state 48 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n629 MC74F2960]
74x296114-bit EDAC bus buffer, inverting, equivalent to Am2961 three-state 24 [https://datasheetspdf.com/pdf-file/501240/Motorola/MC74F2961A/1 MC74F2961A]
74x296214-bit EDAC bus buffer, non-inverting, equivalent to Am2962 three-state 24 [https://datasheetspdf.com/pdf-file/501240/Motorola/MC74F2961A/1 MC74F2962A]
74x2967 1 controller/driver for 16k/64k/256k dRAM 48 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n515 SN74ALS2967]
74x29681 controller/driver for 16k/64k/256k dRAM 48 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n515 SN74ALS2968]
74x29691memory timing controller for use with EDAC 48 [https://archive.org/stream/bitsavers_motoroladaSchottkyTTLData_33878952/1983_Motorola_Schottky_TTL_Data#page/n635 MC74F2969]
74x29701memory timing controller for use without EDAC 24 [https://web.archive.org/web/20181101135701/https://www.datasheetarchive.com/pdf/download.php?id=ad00309f516cac6b7f72d996651e3530b796a5&type=M&term=AM2970 MC74F2970]
74x30374quad 2-input NAND driver 30 Ω 16 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n951 74F3037]
74x30384quad 2-input NAND open-collector driver 30 Ω 16 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n955 74F3038]
74x30402dual 4-input NAND driver 30 Ω 16 [https://archive.org/details/bitsavers_signeticsdaManual_57966640/page/n959 74F3040]
74x3244 2 dual 4-bit buffer / line driver three-state 20 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n509 IDT74FCT3244]
74x3245 1 octal bidirectional transceiver three-state 20 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n515 IDT74FCT3245]
74x3257 4 quad 2-line to 1-line multiplexer / demultiplexer three-state (20) [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n651 IDT74FST3257]
74x3383 1 5-bit 4-port bus exchange switch three-state 24 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n655 IDT74FST3383]
74x3384 2 dual 5-bit bus switch three-state 24 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n509 IDT74FST3384]
74x3390 1 octal 2-line to 1-line multiplexer / bus switch three-state (28) [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n665 IDT74FST3390]
74x3573 1 octal transparent latch three-state 20 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n521 IDT74FCT3573]
74x3574 1 octal D-type flip flop three-state 20 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n527 IDT74FCT3574]
74x3611 1 2304-bit FIFO memory (64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n361 SN74ABT3611]
74x3612 1 4608-bit bidirectional FIFO memory (2x64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n387 SN74ABT3612]
74x3613 1 2304-bit FIFO memory (64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n287 SN74ABT3613]
74x3614 1 4608-bit bidirectional FIFO memory (2x64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n319 SN74ABT3614]
74x3622 1 18432-bit bidirectional FIFO memory (2x256x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n177 SN74ACT3622]
74x3631 1 18432-bit FIFO memory (512x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n105 SN74ACT3631]
74x3632 1 36864-bit bidirectional FIFO memory (2x512x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n233 SN74ACT3632]
74x3638 1 32768-bit bidirectional FIFO memory (2x512x32) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n203 SN74ACT3638]
74x3641 1 36864-bit FIFO memory (1024x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n129 SN74ACT3641]
74x3642 1 73728-bit bidirectional FIFO memory (2x1024x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n259 SN74ACT3642]
74x3651 1 73728-bit FIFO memory (2048x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n153 SN74ACT3651]
74x3708 1 8192-bit PROM (1024x8) open-collector 24 [https://archive.org/details/bitsavers_tidataBookcomputerComponentsDataBook_16851665/page/n177 SN74S3708]
74x3807 1 1-to-10 clock driver driver 20 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n589 IDT74FCT3807]
74x3827 1 10-bit buffer three-state 24 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n535 IDT74FCT3827]
74x3893 1 quad Futurebus backplane transceiver three-state and open-collector (20) [https://archive.org/details/bitsavers_motoroladaFASTandLSTTLData_35934218/page/n313 MC74F3893A]
74x3907 1 Pentium clock synthesizer three-state (28) [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n629 IDT74FCT3907]
74x3932 1 PLL-based clock driver three-state (48) [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n619 IDT74FCT3932]
Part number|74x4000 and above Units Description Input Output Pins Datasheet
74x40022dual 4-input NOR gate 14 [https://web.archive.org/web/20170221111335/http://www.ti.com/lit/ds/symlink/cd74hc4002.pdf CD74HC4002]
74x40152dual 4-bit shift registers 16 [https://web.archive.org/web/20170805221247/http://www.ti.com/lit/ds/symlink/cd74hc4015.pdf CD74HC4015]
74x40164quad bilateral switch analog 14 [https://web.archive.org/web/20170305192102/http://www.ti.com/lit/ds/symlink/cd74hc4016.pdf CD74HC4016]
74x401715-stage ÷10 Johnson counter 16 [https://web.archive.org/web/20131111151724/http://www.ti.com/lit/ds/symlink/cd74hc4017.pdf CD74HC4017]
74x4020114-stage binary counter 16 [https://web.archive.org/web/20170305220915/http://www.ti.com/lit/ds/symlink/sn74hc4020.pdf SN74HC4020]
74x4022 1 4-stage ÷8 Johnson counter 14 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n611 SN74HC4022]
74x402417-stage ripple carry binary counter 14 [https://web.archive.org/web/20170305193812/http://www.ti.com/lit/ds/symlink/cd74hc4024.pdf CD74HC4024]
74x40281BCD to decimal decoder 16 [https://web.archive.org/web/20181101135901/https://www.datasheetarchive.com/pdf/download.php?id=fc8b03b7955212966ddb9e4ad2c3eb621df09f&type=O&term=TC74HC4028P TC74HC4028P]
74x4040112-stage binary ripple counter 16 [https://web.archive.org/web/20161104125848/http://www.ti.com/lit/ds/symlink/sn74hc4040.pdf SN74HC4040]
74x40461phase-locked loop and voltage-controlled oscillator 16 [https://web.archive.org/web/20161130143815/http://www.ti.com:80/lit/ds/symlink/cd74hc4046a.pdf CD74HC4046A]
74x40496hex inverting buffer 16 [https://web.archive.org/web/20170517050814/http://www.ti.com:80/lit/ds/symlink/cd74hc4050.pdf CD74HC4049]
74x40506hex buffer/converter (non-inverting) 16 [https://web.archive.org/web/20170517050814/http://www.ti.com:80/lit/ds/symlink/cd74hc4050.pdf CD74HC4050]
74x40511high-speed 8-channel analog multiplexer/demultiplexer analog 16 [https://web.archive.org/web/20161213211740/http://www.ti.com:80/lit/ds/symlink/cd74hc4051.pdf CD74HC4051]
74x40522dual 4-channel analog multiplexer/demultiplexers analog 16 [https://web.archive.org/web/20161213211740/http://www.ti.com:80/lit/ds/symlink/cd74hc4051.pdf CD74HC4052]
74x40533triple 2-channel analog multiplexer/demultiplexers analog 16 [https://web.archive.org/web/20161213211740/http://www.ti.com:80/lit/ds/symlink/cd74hc4051.pdf CD74HC4053]
74x40591programmable divide-by-N counter 24 [https://web.archive.org/web/20161104185610/http://www.ti.com/lit/ds/symlink/cd74hc4059.pdf CD74HC4059]
74x4060114-stage binary ripple counter with oscillator 16 [https://web.archive.org/web/20170306011107/http://www.ti.com/lit/ds/symlink/sn74hc4060.pdf SN74HC4060]
74x4061 1 14-stage asynchronous binary counter with oscillator 16 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n449 SN74HC4061]
74x40664quad single-pole single-throw analog switch 14 [https://web.archive.org/web/20170305221555/http://www.ti.com/lit/ds/symlink/sn74hc4066.pdf SN74HC4066]
74x4067116-channel analog multiplexer/demultiplexer analog 24 [https://web.archive.org/web/20170804052235/http://www.ti.com/lit/ds/symlink/cd74hc4067.pdf CD74HC4067]
74x4072 2 dual 4-input OR gate 14 TC74HC4072
74x40753triple 3-input OR gate 14 CD74HC4075
74x407818-input OR/NOR gate 14 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n701 MM74HC4078]
74x409418-bit three-state shift register/latch three-state 16 [https://web.archive.org/web/20170706105747/http://www.ti.com/lit/ds/symlink/cd74hc4094.pdf CD74HC4094]
74x4245 1 8-bit 3V/5V translating transceiver three-state (24) [https://archive.org/details/bitsavers_nationaldaCROSSVOLTLowVoltageLogicSeriesDatabook_18426235/page/n135 74LVX4245]
74x4301 1 8-bit latch, inverting three-state 20 [https://archive.org/details/bitsavers_panasonicdicHighSpeedCMOS_23161100/page/n413 MN74HC4301]
74x4302 1 8-bit latch, non-inverting three-state 20 [https://archive.org/details/bitsavers_panasonicdicHighSpeedCMOS_23161100/page/n417 MN74HC4302]
74x4303 1 8-bit D-type flip-flop, inverting outputs three-state 20 [https://archive.org/details/bitsavers_panasonicdicHighSpeedCMOS_23161100/page/n421 MN74HC4303]
74x4304 1 8-bit D-type flip-flop, non-inverting outputs three-state 20 [https://archive.org/details/bitsavers_panasonicdicHighSpeedCMOS_23161100/page/n425 MN74HC4304]
74x4305 2 dual 4-bit buffer, inverting three-state 20 [https://archive.org/details/bitsavers_panasonicdicHighSpeedCMOS_23161100/page/n429 MN74HC4305]
74x4306 2 dual 4-bit buffer, non-inverting three-state 20 [https://archive.org/details/bitsavers_panasonicdicHighSpeedCMOS_23161100/page/n433 MN74HC4306]
74x43164quad analog switch analog 14 [https://archive.org/stream/bitsavers_nationaldaLogicDatabookVolume1_95500749/1984_National_Logic_Databook_Volume_1#page/n703 MM74HC4316]
74x435118-channel analog multiplexer/demultiplexer with latch analog 20 CD74HC4351
74x43522dual 4-channel analog multiplexer/demultiplexer with latch analog 20 CD74HC4352
74x4353 3 triple 2-channel analog multiplexer/demultiplexer with latch analog 20 [https://archive.org/details/bitsavers_motoroladaHighSpeedCMOSData_40597139/page/n741 MC74HC4353]
74x45101 BCD decade up/down counter 16 [https://archive.org/details/bitsavers_rcadataBooMOS_35821859/page/n559 CD74HC4510]
74x45111BCD to 7-segment decoder 16 CD74HC4511
74x451414-to-16 line decoder/demultiplexer, input latches 24 CD74HC4514
74x451514-to-16 line decoder/demultiplexer with input latches; inverting 24 CD74HC4515
74x45161 4-bit binary up/down counter 16 [https://archive.org/details/bitsavers_rcadataBooMOS_35821859/page/n559 CD74HC4516]
74x45182dual 4-bit synchronous decade counter 16 CD74HC4518
74x45202dual 4-bit synchronous binary counter 16 CD74HC4520
74x45382dual retriggerable precision monostable multivibrator 16 CD74HC4538
74x45431BCD to 7-segment latch/decoder/driver for LCDs 16 CD74HC4543
74x4560 1 4-bit BCD adder 16 [https://archive.org/details/bitsavers_nationalda74HCDatabook_36362852/page/n531 MM74HC4560]
74x4724 1 8-bit addressable latch 16 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n457 SN47HC4724]
74x4851 1 8-channel analog multiplexer/demultiplexer analog 16 [https://web.archive.org/web/20160508140402/http://www.ti.com:80/lit/ds/symlink/sn74hc4851.pdf SN74HC4851]
74x5245 1 octal bidirectional transceiver Schmitt-trigger three-state 20 [https://archive.org/details/bitsavers_nationaldaicDatabook_22808448/page/n417 DM74ALS5245]
74x5400 1 11-bit line/memory driver, non-inverting three-state, 25 Ω series resistor 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n605 SN74ABT5400]
74x5401 1 11-bit line/memory driver, inverting three-state, 25 Ω series resistor 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n609 SN74ABT5401]
74x5402 1 12-bit line/memory driver, non-inverting three-state, 25 Ω series resistor 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n613 SN74ABT5402]
74x5403 1 12-bit line/memory driver, inverting three-state, 25 Ω series resistor 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n617 SN74ABT5403]
74x55551programmable delay timer with oscillator 16 [https://assets.nexperia.com/documents/data-sheet/74HC5555.pdf 74HC5555]
74x5620 1 octal bidirectional transceiver Schmitt-trigger three-state 20 [https://archive.org/details/bitsavers_nationaldaicDatabook_22808448/page/n417 DM74ALS5620]
74x63011dynamic memory refresh controller, transparent and burst modes, for 16K, 64K, 256K, and 1M dRAM 52 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n535 SN74ALS6301]
74x63021dynamic memory refresh controller, transparent and burst modes, for 16K, 64K, 256K, and 1M dRAM 52 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n535 SN74ALS6302]
74x6323 1 programmable ripple counter with oscillator three-state (8) [https://assets.nexperia.com/documents/data-sheet/74HC_HCT6323A.pdf 74HC6323A]
74x6800 1 10-bit bus switch with precharge three-state 24 [https://archive.org/details/bitsavers_idtdataBoomanceLogicDataBook_51362967/page/n671 IDT74FST6800]
74x7001 4 quad 2-input AND gate Schmitt-trigger 14 SN74HC7001
74x7002 4 quad 2-input NOR gate Schmitt-trigger 14 SN74HC7002
74x7006 6 two inverters, one 3-input NAND, one 4-input NAND, one 3-input NOR, one 4-input NOR 24 [https://archive.org/details/bitsavers_tidataBookSLogicDataBook_45157566/page/n773 SN74HC7006]
74x70076hex buffer 14 [https://www.alldatasheet.com/datasheet-pdf/pdf/31796/TOSHIBA/TC74HCT7007AF.html TC74HCT7007AP]
74x7008 6 two inverters, three 2-input NAND, three 2-input NOR 24 [https://archive.org/details/bitsavers_tidataBookSLogicDataBook_45157566/page/n777 SN74HC7008]
74x70146hex non-inverting buffer Schmitt-trigger 14 [https://assets.nexperia.com/documents/data-sheet/74HC7014.pdf 74HC7014]
74x7022 1 4-stage ÷8 Johnson counter with power-up clear 14 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n615 SN74HC7022]
74x7030 1 576-bit FIFO memory (64x9) three-state 28 [https://archive.org/details/highspeedcmosda00sign/page/764 74HC7030]
74x7032 4 quad 2-input OR gates Schmitt-trigger 14 [https://archive.org/details/bitsavers_tidataBookSLogicDataBook_45157566/page/n787 SN74HC7032]
74x7038 1 9-bit bus transceiver with latch three-state 24 [https://archive.org/details/bitsavers_rcadataBooMOS_35821859/page/n641 CD74HC7038]
74x70461phase-locked loop with voltage-controlled oscillator and lock detector 16 CD74HC7046A
74x7074 6 two inverters, one 2-input NAND, one 2-input NOR, two D-type flip-flops 24 [https://archive.org/details/bitsavers_tidataBookSLogicDataBook_45157566/page/n791 SN74HC7074]
74x7075 6 two inverters, two 2-input NAND, two D-type flip-flops 24 [https://archive.org/details/bitsavers_tidataBookSLogicDataBook_45157566/page/n797 SN74HC7075]
74x7076 6 two inverters, two 2-input NOR, two D-type flip-flops 24 [https://archive.org/details/bitsavers_tidataBookSLogicDataBook_45157566/page/n803 SN74HC7076]
74x7200 1 2304-bit FIFO memory (256x9) 28 [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n695 SN74ACT7200L]
74x7201 1 4608-bit FIFO memory (512x9) 28 [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n695 SN74ACT7201LA]
74x7202 1 9216-bit FIFO memory (1024x9) 28 [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n695 SN74ACT7202LA]
74x7203 1 18432-bit FIFO memory (2048x9) 28 [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n715 SN74ACT7203L]
74x7204 1 36864-bit FIFO memory (4096x9) 28 [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n715 SN74ACT7204L]
74x7240 1 octal bus buffer, inverting Schmitt-trigger three-state 20 TC74HC7240AP
74x7241 1 octal bus buffer, non-inverting Schmitt-trigger three-state 20 TC74HC7241AP
74x7244 1 octal bus buffer, non-inverting Schmitt-trigger three-state 20 TC74HC7244AP
74x7245 1 octal bus transceiver, non-inverting Schmitt-trigger three-state 20 [https://pdf1.alldatasheet.com/datasheet-pdf/view/23130/STMICROELECTRONICS/M74HC7645.html M74HC7245]
74x72664quad 2-input XNOR gate 14 [https://archive.org/stream/bitsavers_tidataBookogicDataBook_23574286/1984_High-speed_CMOS_Logic_Data_Book#page/n461 SN74HC7266]
74x7292 1 programmable divider/timer 16 [https://pdf1.alldatasheet.com/datasheet-pdf/view/31771/TOSHIBA/TC74HC7292AP.html TC74HC7292AP]
74x7294 1 programmable divider/timer 16 [https://pdf1.alldatasheet.com/datasheet-pdf/view/23075/STMICROELECTRONICS/M74HC7294.html M74HC7294]
74x7403 1 256-bit FIFO memory (64x4) three-state 16 74HC7403
74x7404 1 320-bit FIFO memory (64x5) three-state 18 [https://pdf1.alldatasheet.com/datasheet-pdf/view/15661/PHILIPS/74HC7404.html 74HC7404]
74x75408octal buffer/line driver, inverting Schmitt trigger three-state 20 [https://assets.nexperia.com/documents/data-sheet/74HC_HCT7540.pdf 74HC7540]
74x7541 8octal buffer/line driver, non-inverting Schmitt trigger three-state 20 [https://assets.nexperia.com/documents/data-sheet/74HC_HCT7541.pdf 74HC7541]
74x759718-bit shift register with input latches 16 74HC7597
74x7640 1 octal bus transceiver, inverting Schmitt-trigger three-state 20 [https://pdf1.alldatasheet.com/datasheet-pdf/view/23130/STMICROELECTRONICS/M74HC7645.html M74HC7640]
74x7643 1 octal bus transceiver, non-inverting/inverting Schmitt-trigger three-state 20 [https://pdf1.alldatasheet.com/datasheet-pdf/view/23130/STMICROELECTRONICS/M74HC7645.html M74HC7643]
74x7645 1 octal bus transceiver, non-inverting Schmitt-trigger three-state 20 [https://pdf1.alldatasheet.com/datasheet-pdf/view/23130/STMICROELECTRONICS/M74HC7645.html M74HC7645]
74x7731 4 quad 64-bit static shift register 16 74HC7731
74x7801 1 18432-bit FIFO memory (1024x18), clocked three-state (68) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n21 SN74ACT7801]
74x7802 1 18432-bit FIFO memory (1024x18) three-state (68) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n115 SN74ACT7802]
74x7803 1 9216-bit FIFO memory (512x18), clocked three-state (56) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n37 SN74ACT7803]
74x7804 1 9216-bit FIFO memory (512x18) three-state (56) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n127 SN74ACT7804]
74x7805 1 4608-bit FIFO memory (256x18), clocked three-state (56) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n51 SN74ACT7805]
74x7806 1 4608-bit FIFO memory (256x18) three-state (56) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n139 SN74ACT7806]
74x7807 1 18432-bit FIFO memory (2048x9), clocked three-state (44) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n65 SN74ACT7807]
74x7808 1 18432-bit FIFO memory (2048x9) three-state (44) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n151 SN74ACT7808]
74x7811 1 18432-bit FIFO memory (1024x18), clocked three-state (68) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n81 SN74ACT7811]
74x7813 1 1152-bit FIFO memory (64x18), clocked three-state (56) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n99 SN74ACT7813]
74x7814 1 1152-bit FIFO memory (64x18) three-state (56) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n165 SN74ACT7814]
74x7815 1 4608-bit bidirectional FIFO memory(2x64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n279 SN74ABT7815]
74x7816 1 4608-bit bidirectional FIFO memory(2x64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n291 SN74ABT7816]
74x7817 1 2304-bit FIFO memory(64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n293 SN74ABT7817]
74x7818 1 2304-bit FIFO memory(64x36) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n295 SN74ABT7818]
74x7819 1 18432-bit bidirectional FIFO memory (2x512x18), clocked three-state (80) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n207 SN74ABT7819]
74x7820 1 18432-bit bidirectional FIFO memory (2x512x18) three-state (80) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n229 SN74ABT7820]
74x7821 1 32768-bit bidirectional FIFO memory (2x512x32) three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n317 SN74ACT7821]
74x7822 1 32768-bit bidirectional FIFO memory (2x512x32), clocked three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n325 SN74ACT7822]
74x7823 1 36864-bit FIFO memory (1024x36), clocked three-state (120) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook400_13134187/page/n333 SN74ACT7823]
74x7881 1 18432-bit FIFO memory (1024x18), clocked three-state (68) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n479 SN74ACT7881]
74x7882 1 36864-bit FIFO memory (2048x18), clocked three-state (68) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n495 SN74ACT7882]
74x7884 1 73728-bit FIFO memory (4096x18), clocked three-state (68) [https://archive.org/details/bitsavers_tidataBookeFIFOMemoriesDataBook_33517703/page/n511 SN74ACT7884]
74x8003 2 dual 2-input NAND gate 8 [https://archive.org/stream/bitsavers_tidataBookVol3_25840031/1984_The_TTL_Data_Book_Vol_3#page/n771 SN74ALS8003]
74x8240 1 octal inverting buffer with JTAG port three-state 24 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n23 SN74BCT8240A]
74x8244 1 octal non-inverting buffer with JTAG port three-state 24 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n43 SN74BCT8244A]
74x8245 1 octal bus transceiver with JTAG port three-state 24 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n735 SN74ABT8245]
74x8373 1 octal D-type latch with JTAG port three-state 24 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n85 SN74BCT8373A]
74x8374 1 octal D-type edge-triggered flip-flop with JTAG port three-state 24 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n105 SN74BCT8374A]
74x8400 1 expandable error checker / corrector three-state 48 [https://archive.org/details/bitsavers_tidataBook_28346484/page/n541 SN74ALS8400]
74x8543 1 octal registered bus transceiver with JTAG port three-state 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n757 SN74ABT8543]
74x8646 1 octal bus transceiver and register with JTAG port three-state 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n765 SN74ABT8646]
74x8652 1 octal bus transceiver and register with JTAG port three-state 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n775 SN74ABT8652]
74x8814 1 16-bit microprogram sequencer, cascadable three-state (84) [https://archive.org/details/bitsavers_tidataBookamily32BitCMOSProcessorBuildingBlocksDat_39357329/page/n19 SN74ACT8814]
74x8832 1 32-bit registered ALU three-state (208) [https://archive.org/details/bitsavers_tidataBookamily32BitCMOSProcessorBuildingBlocksDat_39357329/page/n79 SN74ACT8832]
74x8834 1 40-bit register file three-state (156) [https://archive.org/details/bitsavers_tidataBook_28346484/page/n545 SN74AS8834]
74x8836 1 32x32-bit multiplier/accumulator three-state (156) [https://archive.org/details/bitsavers_tidataBookamily32BitCMOSProcessorBuildingBlocksDat_39357329/page/n273 SN74ACT8836]
74x8837 1 64-bit floating point unit three-state (208) [https://archive.org/details/bitsavers_tidataBookamily32BitCMOSProcessorBuildingBlocksDat_39357329/page/n307 SN74ACT8837]
74x8838 1 64-bit barrel shifter three-state (84) [https://archive.org/details/bitsavers_tidataBook_28346484/page/n555 SN74AS8838]
74x8839 1 32-bit shuffle/exchange network three-state (85) [https://web.archive.org/web/20181101144407/https://www.datasheetarchive.com/pdf/download.php?id=469cacb04e3c956e57377d25632b62e8535207&type=M&term=SN74AS8839 SN74AS8839]
74x8840 1 digital crossbar switch three-state (156) [https://web.archive.org/web/20181101144640/https://www.datasheetarchive.com/pdf/download.php?id=ea27cdfb35565c5284d5484354115b19436338&type=M&term=SN74AS8840 SN74AS8840]
74x8841 1 digital crossbar switch three-state (156) [https://archive.org/details/bitsavers_tidataBookamily32BitCMOSProcessorBuildingBlocksDat_39357329/page/n435 SN74ACT8841]
74x8847 1 64-bit floating point and integer unit three-state (208) [https://archive.org/details/bitsavers_tidataBookamily32BitCMOSProcessorBuildingBlocksDat_39357329/page/n461 SN74ACT8847]
74x8952 1 octal registered bus transceiver with JTAG port three-state 28 [https://archive.org/details/bitsavers_tidataBookiCMOSTechnologyDataBook_40217042/page/n785 SN74ABT8952]
74x8980 1 JTAG test access port master with 8-bit host interface three-state 24 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n795 SN74LVT8980]
74x8990 1 JTAG test access port master with 16-bit host interface three-state (44)[https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n825 SN74ACT8990]
74x8994 1 JTAG scan-controlled logic/signature analyzer (28) [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n837 SN74ACT8994]
74x8996 1 multidrop-adressable JTAG transceiver 24 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n847 SN74ABT8996]
74x8997 1 scan-controlled JTAG concatenator three-state 28 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n887 SN74ACT8997]
74x8999 1 scan-controlled JTAG multiplexer three-state 28 [https://archive.org/details/bitsavers_tidataBookLogicDataBook_44713328/page/n911 SN74ACT8999]
74x90149nine-wide buffer/line driver, inverting Schmitt trigger 20 74HC9014
74x90159nine-wide buffer/line driver, non-inverting Schmitt trigger 20 74HC9015
74x9046 1 PLL with band gap controlled VCO 16 [https://assets.nexperia.com/documents/data-sheet/74HCT9046A.pdf 74HCT9046]
74x9114 9 nine-wide inverter Schmitt-trigger open-collector 20 [https://assets.nexperia.com/documents/data-sheet/74HC_HCT9114.pdf 74HC9114]
74x91159 nine-wide buffer Schmitt-trigger open-collector 20 [https://assets.nexperia.com/documents/data-sheet/74HC9115.pdf 74HC9115]
74x9323 1 programmable ripple counter with oscillator three-state (8) 74HC9323A
74x40102 1 presettable synchronous 2-decade BCD down counter 16 [https://archive.org/details/bitsavers_rcadataBooMOS_35821859/page/n603 CD74HC40102]
74x401031presettable 8-bit synchronous down counter 16 [https://web.archive.org/web/20161104125904/http://www.ti.com/lit/ds/symlink/cd74hc40103.pdf CD74HC40103]
74x4010444-bit bidirectional universal shift register three-state 16 [https://archive.org/details/bitsavers_rcadataBooMOS_35821859/page/n613 CD74HC40104]
74x401051 64-bit FIFO memory (16x4) three-state 16 CD74HC40105
Part number Units Description Input Output Pins Datasheet

Smaller footprints

As board designs have migrated away from large amounts of logic chips, so has the need for many of the same gate in one package. Since about 1996,[1] there has been an ongoing trend towards one / two / three logic gates per chip. Now logic can be placed where it is physically needed on a board, instead of running long signal traces to a full-size logic chip that has many of the same gate.[2]

All chips in the following sections are available 4 to 12 pin surface mount packages. The right digits, after the 1G/2G/3G, typically has the same functional features as older legacy chips, except for the multifunctional chips and 4-digit chip numbers which are unique to these newer families. The "x" in the part number is a place holder for the logic family name. For example, 74x1G14 in "LVC" logic family would be "74LVC1G14". The previously stated prefixes of "SN-" and "MC-" are used to denote manufacturers, Texas Instruments and ON Semiconductor respectively.[3][4][5]

Some of the manufacturers that make these smaller IC chips are: Diodes Incorporated, Nexperia (NXP Semiconductors), ON Semiconductor (Fairchild Semiconductor), Texas Instruments (National Semiconductor), Toshiba.

One gate chips

All chips in this section have one gate, noted by the "1G" in the part numbers. The most popular logic families are LVC and AUP, however there have been other releases such as AUC and AXP families with shorter propagation delays or expansions of the existing families such as the AHC(T) and HC(T).

Part number Description Input Output Datasheet
74x1G00 single 2-input NAND gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G00.pdf LVC]
74x1G02 single 2-input NOR gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G02.pdf LVC]
74x1G04 single inverter gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G04.pdf LVC]
74x1G06 single inverter gate schmitt-trigger open-drain [https://assets.nexperia.com/documents/data-sheet/74LVC1G06.pdf LVC]
74x1G07 single buffer gate schmitt-trigger open-drain [https://assets.nexperia.com/documents/data-sheet/74LVC1G07.pdf LVC]
74x1G08 single 2-input AND gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G08.pdf LVC]
74x1G09 single 2-input AND gate open-drain [https://assets.nexperia.com/documents/data-sheet/74AUP1G09.pdf AUP]
74x1G14 single inverter gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC1G14.pdf LVC]
74x1G17 single buffer gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC1G17.pdf LVC]
74x1G27 single 3-input NOR gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G27.pdf LVC]
74x1G32 single 2-input OR gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G32.pdf LVC]
74x1G34 single buffer gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G34.pdf LVC]
74x1G57 single configurable 7-function gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC1G57.pdf LVC]
74x1G58 single configurable 7-function gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC1G58.pdf LVC]
74x1G79 single D-type flip-flop, positive-edge trigger [https://assets.nexperia.com/documents/data-sheet/74LVC1G79.pdf LVC]
74x1G80 single D-type flip-flop, positive-edge trigger, inverted output [https://assets.nexperia.com/documents/data-sheet/74LVC1G80.pdf LVC]
74x1G86 single 2-input XOR gate [https://assets.nexperia.com/documents/data-sheet/74LVC1G86.pdf LVC]
74x1G97 single configurable 7-function gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC1G97.pdf LVC]
74x1G98 single configurable 7-function gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC1G98.pdf LVC]
74x1G99 single configurable 15-function gate, active-low enable schmitt-trigger three-state [https://assets.nexperia.com/documents/data-sheet/74LVC1G99.pdf LVC]
74x1G123 single retriggerable monostable multivibrator, clear [https://assets.nexperia.com/documents/data-sheet/74LVC1G123.pdf LVC]
74x1G125 single buffer gate, active-low enable three-state [https://assets.nexperia.com/documents/data-sheet/74LVC1G125.pdf LVC]
74x1G126 single buffer gate, active-high enable three-state [https://assets.nexperia.com/documents/data-sheet/74LVC1G126.pdf LVC]
74x1G373 single transparent latch, active-low enable three-state LVC
74x1G374 single D-type flip-flop, active-low enable three-state LVC
74x1G386 single 3-input XOR Gate (a.k.a. even-parity generator) [https://assets.nexperia.com/documents/data-sheet/74LVC1G386.pdf LVC]
74x1G0832 single 3-input AND-OR combo gate (2-input AND into OR) schmitt-trigger LVC
74x1G3208 single 3-input OR-AND combo gate (2-input OR into AND) schmitt-trigger LVC

Two gate chips

All chips in this section have two gates, noted by the "2G" in the part numbers. The "2G" chips mainly consist of AUG and LVC logic families, more recently AHC, AHCT, HC, HCT families have been expanding, plus some support for AXP family.

Part number Description Input Output Datasheet
74x2G00 dual 2-input NAND gate [https://assets.nexperia.com/documents/data-sheet/74LVC2G00.pdf LVC]
74x2G02 dual 2-input NOR gate [https://assets.nexperia.com/documents/data-sheet/74LVC2G02.pdf LVC]
74x2G04 dual inverter gate [https://assets.nexperia.com/documents/data-sheet/74LVC2G04.pdf LVC]
74x2G06 dual inverter gate schmitt-trigger open-drain [https://assets.nexperia.com/documents/data-sheet/74LVC2G06.pdf LVC]
74x2G07 dual buffer gate schmitt-trigger open-drain [https://assets.nexperia.com/documents/data-sheet/74LVC2G07.pdf LVC]
74x2G08 dual 2-input AND gate [https://assets.nexperia.com/documents/data-sheet/74LVC2G08.pdf LVC]
74x2G14 dual inverter gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC2G14.pdf LVC]
74x2G17 dual buffer gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC2G17.pdf LVC]
74x2G32 dual 2-input OR gate [https://assets.nexperia.com/documents/data-sheet/74LVC2G32.pdf LVC]
74x2G34 dual buffer gate [https://assets.nexperia.com/documents/data-sheet/74LVC2G34.pdf LVC]
74x2G79 dual D-type flip-flop, positive-edge trigger LVC
74x2G80 dual D-type flip-flop, positive-edge trigger, invert output LVC
74x2G125 dual buffer, active-low enable three-state [https://assets.nexperia.com/documents/data-sheet/74LVC2G125.pdf LVC]
74x2G126 dual buffer, active-high enable three-state [https://assets.nexperia.com/documents/data-sheet/74LVC2G126.pdf LVC]
74x2G240 dual inverter, active-low enable, three-state [https://assets.nexperia.com/documents/data-sheet/74LVC2G240.pdf LVC]
74x2G241 dual buffer, active-low and active-high enables three-state [https://assets.nexperia.com/documents/data-sheet/74LVC2G241.pdf LVC]
74x2G0604 dual combo gates - one inverter, one inverter with O.D. open-drain [https://assets.nexperia.com/documents/data-sheet/74AUP2G0604.pdf AUP]
74x2G3404 dual combo gates - one buffer, one inverter [https://assets.nexperia.com/documents/data-sheet/74AUP2G3404.pdf AUP]
74x2G3407 dual combo gates - one buffer, one buffer with O.D. open-drain [https://assets.nexperia.com/documents/data-sheet/74AUP2G3407.pdf AUP]

Three gate chips

All chips in this section have three gates, noted by the "3G" in the part numbers. The "3G" chips mainly consist of AUG and LVC logic families, more recently AHC, AHCT, HC, HCT families have been expanding.

Part number Description Input Output Datasheet
74x3G04 triple inverter gate [https://assets.nexperia.com/documents/data-sheet/74LVC3G04.pdf LVC]
74x3G06 triple inverter gate schmitt-trigger open-drain [https://assets.nexperia.com/documents/data-sheet/74LVC3G06.pdf LVC]
74x3G07 triple buffer gate schmitt-trigger open-drain [https://assets.nexperia.com/documents/data-sheet/74LVC3G07.pdf LVC]
74x3G14 triple inverter gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC3G14.pdf LVC]
74x3G17 triple buffer gate schmitt-trigger [https://assets.nexperia.com/documents/data-sheet/74LVC3G17.pdf LVC]
74x3G34 triple buffer gate [https://assets.nexperia.com/documents/data-sheet/74LVC3G34.pdf LVC]
74x3G0434 triple combo gates - two inverter, one buffer [https://assets.nexperia.com/documents/data-sheet/74AUP3G0434.pdf AUP]
74x3G3404 triple combo gates - two buffer, one inverter [https://assets.nexperia.com/documents/data-sheet/74AUP3G3404.pdf AUP]

See also

  • 4000-series integrated circuits, List of 4000-series integrated circuits
  • Push–pull output, Open-collector/drain output, Three-state output
  • Schmitt trigger input
  • Logic gate, Logic family
  • Programmable logic device
  • Pin compatibility

References

{{more footnotes|date=June 2013}}
1. ^{{cite web |title=The Fairchild Division of National Semiconductor Introduces Industry's Fastest 5V Single-Gate Logic |url=https://web.archive.org/web/19980512215641/http://fairchildsemi.com:80/news/1996/9611/dm96001dl.html |publisher=Fairchild Semiconductor |accessdate=July 27, 2018 |date=November 25, 1996}}
2. ^{{cite web |title=Unique and Novel Uses for ON Semiconductor's New One-Gate family |url=http://www.onsemi.com/pub/Collateral/AND8018-D.PDF |publisher=ON Semiconductor |archiveurl=https://web.archive.org/web/20010709003217/http://www.onsemi.com:80/pub/Collateral/AND8018-D.PDF |archivedate=July 9, 2001 |date=June 2000 |dead-url=no}}
3. ^2018 Little Logic Guide; Texas Instruments.
4. ^[https://assets.nexperia.com/documents/brochure/75017458.pdf 74AUP Logic Guide; NXP.]
5. ^[https://assets.nexperia.com/documents/brochure/75017668.pdf 74LVC Logic Guide; NXP.]
  • Digital Integrated Circuits, National Semiconductor Corporation, January 1974
  • Logic/Memories/Interface/Analog/Microprocessor/Military Data Manual, Signetics Corporation, 1976
  • The Bipolar Microcomputer Components Data Book for Design Engineers, Second Edition, Texas Instruments, 1979
  • The TTL Data Book for Design Engineers, Second Edition, Texas Instruments, 1976
  • Bipolar LSI 1982 Databook, Monolithic Memories Incorporated, September 1981
  • Schottky TTL Data, DL121R1 Series D Third Printing, Motorola, 1983
  • High-Speed CMOS Logic Data Book, Texas Instruments, 1984
  • Logic: Overview, Texas Instruments Incorporated
  • ALVC Advanced Low-Voltage CMOS Including SSTL, HSTL, And ALB (Rev. B), Texas Instruments, 2002
  • IC Master, 1976
  • Schottky and Low-Power Schottky Data Book, Advanced Micro Devices, July 1978

Further reading

{{See also|7400-series integrated circuits#Further reading|l1=List of books about 7400-series integrated circuits}}{{DEFAULTSORT:7400 TTL}}

4 : Digital electronics|Electronic design|Electronics lists|Integrated circuits

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