1. Applications
    Powertrain applications  Safety applications  Body applications 

2. Technical features
    System performance  TriCore DSP functionality  Safety  Security  Scalability  Connectivity  Supply security 

3. Tools and software

4. References

5. External links

AURIX (Automotive Realtime Integrated NeXt Generation Architecture) is a 32-bit Infineon microcontroller family, targeting the automotive industry in terms of performance and safety. Its multicore architecture, based on up to three independent 32-bit TriCore CPUs.

Applications

Powertrain applications

Infineon AURIX covers several applications in Automotive Powertrain such as:

• Gasoline Direct Injection
• Gasoline Multi-Port Injection
• Diesel Direct Injection
• Automatic Transmission – Hydraulic Control
• Dry Double Clutch Transmission – Hydraulic/Electrical Control
• Integrated (H)EV Control
• (H)EV Battery Management System

Safety applications

• Chassis Domain Control: The AURIX multicore architecture includes encapsulation features to support freedom of interference of multiple applications ^[1]
• Electric Power Steering (EPS)^[2]
• Active Suspension Control System ^[3]
• Advanced Airbag System ^[4]
• Braking ECU ^[5]
• Multi-purpose Camera Configuration
• Short Range RADAR (24 GHz) System
• Long Range RADAR (76/77 GHz) System

Body applications

• Body Domain Controller
• Gateway
• Advanced Body Applications

Technical features

System performance

The AURIX family devices range in the ultra high-end from a 300 MHz triple-core device with 8MB of embedded Flash to a 200 MHz triple core with 4MB of embedded Flash to a 200 MHz dual-core device with 2.5MB of embedded Flash right down to 130 MHz and 80 MHz single-core and single core lockstep devices with 1.5MB, 1MB and 0.5MB of embedded Flash. The package portfolio includes a BGA-516 package with a ball-compatible BGA-292 package (I/O subset), and compatible QFP-176, QFP-144, QFP‑100 to QFP-64 packages.

TriCore DSP functionality

• MultiCore
• TriCore with up to 300 MHz per core
• 1.7-2.4 DMIPS/MHz
• DSP with up to 1.8 GFLOPS
• Supports floating point and fixed point operations with all cores
• Fast Fourier accelerator
• Pixel Preprocessor
• Embedded EEPROM{{Dubious|date=September 2017}}
• Generic Timer Module (GTM)
• Advanced timer unit for totally flexible PWM generation and hardware input capture
• Redundant flexible 12-bit ADC
• Delta sigma converters
• Single supply 5V or 3.3V
• Availability of AUTOSAR 4.x and 3.2.1
• Ta = -40°C ... 145°C

Safety

The AURIX architecture has been developed according to an audited ISO26262 compliant process and designed to meet ASIL-D on an application level. The platform is uses up to 2 in TriCore lockstep mode, a lockstep architecture combined with safety technology such as safe internal communication buses or distributed memory protection systems. Hardware level encapsulation techniques allow integration of software with various safety levels (QM to ASIL-D) from different sources, reducing the system complexity of implementing those safety levels.

The AURIX architecture offers the following features that help in achieving a given safety level:

• Hardware-focused safety concepts for reduced SW overhead
• Lockstep with clock delay
• Access permission system
• Safety management unit
• Safe DMA
• I/O, clock and voltage monitors
• Safety Software for checking the functionality of the core
• ISO 26262 conformance to support safety requirements up to ASIL-D

Security

Infineon has integrated a programmable Hardware Security Module (HSM) into the AURIX family in line with EVITA (E-safety vehicle intrusion protected applications). The security module was implemented by the market leader in chipcard technology using state-of-the art encryption technology. This “embedded chipcard” protects against attacks of IP infringement, fraud and software hijacking.

• Hardware Security Module (HSM)
• Secure software updates, Secure Boot, Secure Key Update, Secure Communication
• Immobilizer
• Tuning protection
• Milage protection
• Component protection
• IP protection

Scalability

• From Single Core to Triple Lockstep Core
• 80-300 MHz
• 256KB-8MB Flash
• 48KB-2.7MB SRAM
• ASIL Level from QM up to ASIL D
• HOT Package Option

Connectivity

• Ethernet 100Mbit
• FlexRay
• High Speed Serial Link IF
• SPI, CAN (FD), LIN, UART
• Hardware SENT interface for low CPU load
• Camera Interface (up to 16-bit)
• External ADC IF (up to 16-bit)
• External Bus Interface for Memory Extension

Supply security

Infineon has set up dual-fab manufacturing using two local separated Frontend production sites. Both sites are using identical certified processes and tooling. All products from both sides will be AEC-Q100 qualified and are manufactured in a 65 nm technology.

Tools and software

Infineon has several full-featured evaluation boards for their TriCore product line.^[6] Development tools for evaluation such as compilers, debuggers and DAVE IDE are included, as well as technical documentation: user manuals, architecture manuals, application notes, data sheets, board documentation.

References

External links

• Infineon Microcontroller Page
• Infineon Aurix Page

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