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词条 Gunning transceiver logic
释义

  1. References

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Gunning transceiver logic or GTL is a type of logic signaling used to drive electronic backplane buses. It has a voltage swing between 0.4 volts and 1.2 volts—much lower than that used in TTL and CMOS logic—and symmetrical parallel resistive termination. The maximum signaling frequency is specified to be 100 MHz, although some applications use higher frequencies. GTL is defined by JEDEC standard JESD 8-3 (1993) and was invented by William Gunning while working for Xerox at the Palo Alto Research Center.

All Intel front-side buses use GTL. As of 2008, GTL in these FSBs has a maximum frequency of 1.6 GHz.[1] The front-side bus of the Intel Pentium Pro, Pentium II and Pentium III microprocessors uses GTL+ (or GTLP) developed by Fairchild Semiconductor, an upgraded version of GTL which has defined slew rates and higher voltage levels. AGTL+ stands for either assisted Gunning transceiver logic or advanced Gunning transceiver logic. These are GTL signaling derivatives used by Intel microprocessors.

References

1. ^{{Citation |title=Intel's Atom Architecture |last=Shimpi |first=Anand Lal |date=2008 |url=http://www.anandtech.com/showdoc.aspx?i=3276&p=15}}
{{Refbegin}}
  • {{Citation |url=http://www.fairchildsemi.com/an/AN/AN-1070.pdf |title=GTLP vs. GTL: A Performance Comparison from a System Perspective |publisher=Fairchild Semiconductor |work=AN-1070 |date=December 2000}}
  • {{Citation |url=http://focus.ti.com/lit/an/scea003a/scea003a.pdf |title=GTL/BTL: A Low-Swing Solution for High-Speed Digital Logic |publisher=Texas Instruments |work=Application Note |date=1997}}
  • {{Citation |url=http://www.jedec.org/sites/default/files/docs/JESD8-3A.pdf |title=JEDEC Standard JESD8-3A, Gunning Transceiver Logic (GTL) Low-Level, High Speed Interface Standard for Digital Integrated Circuits |publisher=JEDEC |date=May 2007}}
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3 : Computer buses|JEDEC standards|Logic families

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